Minhphu Do Email & Phone Number

Vietnam

Vietnam

• Position: Highspeed Interface Leader
• Working on design, verify and implement Memory for 5G system (STAR Memory)
• Build up clock distribution and reset system for DFE system
• Design controller and configuration for Multi-protocol PHY
• Involving in configuration, verifying specification and functional testing CPRI
• Participating in synthesis and analyze timing constraints

Vietnam

• Position: Mobile Logic Baseband Hardware Design EngineerResponsible for developing and designing Logic baseband hardware including AP, Memory, GPIO, Sensor, etc., and power management system of VSMART Mobile Phone.
• Review and schematic design including GPIO, power management component selection, capture design
• Performs electrical simulation (SI/PI, PDN coupling placement and cost optimization)
• Work closely with ODM in hardware design development and contribute technically.
• Build design processes and create detailed test plans to improve performance and quality
• Diagnoses hardware, software, systems failures and support analyze and resolve market technical issues

Vietnam

• Position: Memory Design Leader (Aug 2015 – Dec 2018) Memory Design and Characterization Engineer (Aug 2014 – Aug 2015)Responsible for design and implementation database of Company’s Intellectual Property (IP). Being a.
• Participating in design module of Memory Controller (Main control, Signal generation, Data Path, PLL and DDR Power Supply)
• Working on optimize and build up features for MC (Multi-Channel Configuration, Multi-Rank Configuration, Proprietary Non-Blocking Priority-Based DDRx/LPDDRx SDRAM Control)
• Proposing architecture and characterization testing method for MBIST
• Responsible for design and develop Double Data Rate (DDR) SDRAM, Low Power Double Data Rate (LPDDR) SDRAM for computer and mobile
• Involving in verifying specification and functional testing (interface, signal access, burst, signal potential, system bandwidth)