Mitchell Koblis Email & Phone Number

In addition to my duties here at Goodwill Industries of Silicon Valley, I continue to research and hone my ideas in the integrated circuit packaging arena. Due to the constant push to miniaturize the integrated circuit, the challenge to efficiently package these chips reliably has proven to be extremely challenging. The wafer fab industry uses a silicon wafer to build upon layers and layers to create chips for thousands of different applications. This silicon has a very low coefficient thermal expansion, and in comparison to today's "packaging" substrate materials, which are high, creates performance and reliability issues. Using flip chip BGA or mBGA as an example, the solder balls are aligned to the pads on the chip and re-flowed to create a connection. The chip will not move when subjected to varying temperatures, but the substrate materials that the chip is mounted to will, causing the fracturing of the solder attachments, rendering the chip useless, and thus the device it serves useless to the consumer, or? Here are the two patents filed under my name, of which in part solves these issues.Please feel free to look them up and review them.Method of making bondable leads using positive photoresist and structures made therefromPublication number: 20030008489 Type: applicationMethod of making bondable leads using positive photoresist and structures made therefromPatent number: 7087510Type: GrantMicroelectronic assembly formation with releasable leadsPublication number: 20030075358Type: ApplicationMicroelectronic assembly formation with releasable leadsPatent number: 6939735Type: Grant