Senior Engineer
CurrentEmulation and Full-Chip verification for our series of RISCV cores and fabric.
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@marvell.com
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2 phones found area 408
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Mike Dennison is listed as Senior Engineer at Akeana, based in Farmington, Connecticut, United States. AeroLeads shows a work email signal at marvell.com, phone signal with area code 408, and a matched LinkedIn profile for Mike Dennison.
Mike Dennison previously worked as Principal Engineer at Marvell Technology and Principal Engineer at Cavium Inc. Mike Dennison holds Bsee, Electrical Engineering from Tufts University.
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AeroLeads found 1 current-domain work email signal for Mike Dennison. Compare company email patterns before reaching out.
Semiconductor Verification Engineer with experience developing plans and software for the testing of ASIC devices both pre and post silicon. Direct experience taking products from specification through to full production.Specialties: Software:Software Design – Python, C, C++, TCL, Perl, Shell Scripting, MakeHardware Design/Verification – System Verilog, C++, UVM/OVM, E/Specman, Verilog Emulation: Veloce StratoNetworking:Ethernet (10/100/1000, 10G), SONET/SDH, OTN, GFP, FC, VC/LCAS, IEEE1588Interfaces: DDR4, DDR3, XAUI, XFI, SPI4, SPI3, SFI, TFI, SGMII Hardware:Spirent SmartBits Platform, JDSU ONT and Testpoint PlatformsOscilloscopes, Logic Analyzers, Function Generators, Xilinx FPGA’s, GPIB, SCPI
Listed skills include Verilog, Asic, Tcl, Perl, and 29 others.
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San Jose, CA, US
Emulation and Full-Chip verification for our series of RISCV cores and fabric.
Santa Clara, CA, US
ASIC verification of coprocessor blocks. Emulation testing for performance of ASIC cores with our proprietary fabric.
Manger for the Functional Validation Group. Developed and implemented testing plans for a 10Gb Ethernet MAC and 10Gb PHY/Mapper device supporting Ethernet, SONET/SDH, OTN, Gfp and Fiber Channel. Oversaw the testing activities of a cross-functional group across multiple locations.
Pre Silicon Verification and Post Silicon Validation of a 10Gb Ethernet over Sonet VC/LCAS Mapper ASIC and 10Gb Ethernet MAC. Testing of both hardware and Embedded Software in Simulation as well as in the Lab.Direct support of customer applications and issues.
Boston, MA, US
Helped develop computationally light algorithm for Inverse Scattering, which is a type of Computed Tomography (CT). Implemented, tested and expanded the algorithm which is described in two papers published in the journal "Inverse Problems".
Software Intern working on Instant Messaging and Gateway management for a home router.
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Mike Dennison works for Akeana.
Mike Dennison is listed as Senior Engineer at Akeana.
AeroLeads has found 1 work email signal at @marvell.com for Mike Dennison at Akeana.
AeroLeads has found 2 phone signal(s) with area code 408 for Mike Dennison at Akeana.
Mike Dennison is based in Farmington, Connecticut, United States while working with Akeana.
Mike Dennison has worked for Akeana, Marvell Technology, Cavium Inc, Vitesse Semiconductor, and Northeastern University.
You can use AeroLeads to view verified contact signals for Mike Dennison at Akeana, including work email, phone, and LinkedIn data when available.
Mike Dennison holds Bsee, Electrical Engineering from Tufts University.
Mike Dennison is listed with skills including Verilog, Asic, Tcl, Perl, C, Hardware, Fpga, and Soc.
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