Experienced Design Verification Engineer with expertise in SystemVerilog, UVM, and protocols like SPI, APB, AXI, and I2C. I specialize in developing verification environments and have worked on projects like design of a 32-bit RISC-V core, I2C slave memory, and FIFO architectures. With an M.Tech in Microelectronics and VLSI Design from NIT Calicut, I am passionate about solving challenges in hardware design and verification while delivering high-quality results.