Mona Mohamed Email & Phone Number

Sydney, New South Wales, Australia

Egypt

Embedded Software Engineer developing emulation-based solutions for functional verification in the area of storage and communication protocols. Developed the Application layer using C++ under Linux for UFS communication protocol to act as a Virtual UFS device which is a component of Veloce VirtuaLAB that consists of a set of Mentor Graphics emulation-based solutions for functional verification in the area of multimedia, networking, storage, and communication protocols. This was part of a verification solution for Samsung Integrated the application layer of Virtual UFS device with the data link layer Worked on customizing UFS device driver as a kernel module which allows the kernel to access hardware connected to the system Developed test scenarios that run on emulator as a host controller to internally test the Virtual UFS device and the integration with the link layer and physical layer Integrated Virtual UFS device with UFS host from LTTS to verify the device Supporting the Virtual UFS device solution, adding enhancements and fixing customer issues Experienced with SCSI Architectural Model Generating release archives for VirtuaLAB solutions Worked in testing multiple designs for VirtuaLAB verification solutions like SATA, USB3 and PCIe3 with QEMU virtual machine in simulation and emulation Experienced in configuring the designs to run in emulation on Veloce (Mentor Emulation Product) Using Atlassian JIRA system for projects planning and issues tracking Automating regression test suites by configuring them to run on Jenkins server Working based on the Agile software development method

Egypt

QA Enginner testing the functionality and features of UVM (Universal Verification Methodology) and OVM (Open Verification Methodology) using Questa simulation tool and System Verilog language. Testing the functionality and features of UVM (Universal Verification Methodology) and OVM (Open Verification Methodology) using Questa simulation tool and System Verilog language Redesigning UVM tests through implementing self-checking techniques, which eliminated fake failures for all test cases andimproved the overall QA process stability Testing UVM connect features using Questa, SystemC and System Verilog languages Participated in testing System Verilog language on Questa Developing scripts for automating multiple testing processes for different projects using perl, csh, ksh and bash Developed scripts for testing the performance of different UVM versions Follow up on daily regression tests and fixing/reporting any bugs