Arkadiy Morgenshtein Email & Phone Number

Haifa

Mentoring projects on low-power circuits and power optimization in VLSI Research Lab.Lead tens of undergraduate projects in variety of VLSI domains, including low-power digital circuits, CMOS image sensors, analog readout circuits for Ion-Sensitive FET sensors, EDA tools for power and timing optimization, on-chip interconnect design, asynchronous logic.

Leading the group responsible for the architecture and system engineering of the state-of-the-art automotive imaging product. Development and PoC of new system functions, analysis, modeling and optimization of system performance. Lead the definition of system requirements and close development collaboration with all Product and R&D groups, including Chip.

Leading the technological roadmap establishment in Given Imaging, as part of business unit strategic innovation process. Technology evaluation and trends analysis, mapping of emerging solutions with strategic business directions while working with stakeholders in Marketing, R&D, and other corporate and external organizations. Participating in.

Managing the systems engineering team in Given Imaging. Leading the methodology definition for new products system engineering. Managing multi-functional projects for development and integration of new technological solutions. Collaboration with stakeholders across the business for definition and implementation of engineering, regulatory, clinical and.

Lead the development of a novel chipset architecture including state of the art low-power image sensor, digital image processing, digital and analog communication. Responsible for all life cycle - chipset architecture, technical feasibility, requirements definition, fabrication process and vendors selection, management of design contractor activities..

Haifa, Israel

Research of technologies for functional verification and system characterization. Lead the development of automation tool for architecture-level analysis of post-silicon failures. Drive research for power and timing optimization by logic transformation at synthesis level of VLSI design. Conduct activities for power and performance characterization at.

Haifa, Israel

Technical leadership in research and development of EDA tools for power reduction and estimation in major Intel projects. Owned the R&D of a RTL Power Feedback tool, starting from initial POC, through development, to representation of the tool to customers across Intel. Utilized a new tool for precise netlist-level power estimation, and developed full-chip.

Conducted research of on-chip interconnect optimization. Developed techniques for high-speed low-power communication at physical layer of Networks-on-Chip. Developed models for power and performance analysis of interconnect links from circuit to system level.Supervised more than 70 projects on design of low-power digital systems, biomedical ASICs, digital.

Researched and developed digital cameras in standard CMOS semiconductor technology. Developed the sensors and the digital control of the systems and participated in post-manufacturing system characterization.Developed an integrated semiconductor system for breast cancer detection. The chip included high-density array of sensors coupled with readout.

Invented and developed technologies for ultra-low power digital circuit design. Work on commercialization of IP portfolio via Technion Technology Transfer unit with leading venture capital funds.

Served in series of positions. Instructor, Project Coordinator, Research Engineer in fields of image sensors, Project Officer in airborne communications systems project (with RAFAEL)

Phd, Electrical Engineering

Research Topic – “Design and Optimization of On-Chip Interconnect”

Mba, Business Administration

Specialization – Entrepreneurship and Management of Technology-Based Firms

M.Sc., Biomedical Engineering

Research Topic –”Design and Methodology of Ion-Sensitive FET Microsystems for Bio-Telemetry”

B.Sc., Electrical Engineering