Morin Dehan

Morin Dehan Email and Phone Number

Characterization Team Leader @ Incize
belgium
Morin Dehan's Location
Ottignies, Walloon Region, Belgium, Belgium
Morin Dehan's Contact Details

Morin Dehan personal email

n/a
About Morin Dehan

20+ years experience in semiconductor R&D.Establishing the link between innovative process ideas and successful design implementation for advanced semiconductor processing in logic scaling, memory FLASH, RRAM, MRAM), back-end-of line and 3D IC. Specialties: IC Test structures Design, RF and Analog Device characterization and modeling. RF technology process module setup. Analog measurements. EDA tools support for IC design: calibre DRC/LVS/PEX, Setting up of Cadence Env. for analog design.Standard cell design and characterization [ELC], CMOS modeling [BSIM3 / BSIM4 / PSP], Passive component modeling.

Morin Dehan's Current Company Details
Incize

Incize

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Characterization Team Leader
belgium
Website:
incize.com
Employees:
12
Morin Dehan Work Experience Details
  • Incize
    Characterization Team Leader
    Incize Apr 2024 - Present
    Ottignies-Louvain-La-Neuve, Walloon Region, Belgium
  • Europe Canaantek
    Director
    Europe Canaantek Oct 2021 - Apr 2024
    Belgium
    Responsible for + Setting up the company operation in Belgium+ Team hiring+ Project support with European partners + Technology investigation
  • Sony Depthsensing Solutions
    R&D Team Leader
    Sony Depthsensing Solutions Apr 2019 - Sep 2021
    Brussels Area, Belgium
    Setting up research tracks for future depthsensing technologies+ Multi-spectral investigation, analysis of multiple wavelength (NIR/SWIR) for Time of Flight applications+ Time of flight + Radar complementarity / fusion study based on applications+ Direct Time of flight system analysis; active contribution to the development of direct time of flight simulator, validated by product measurements. The simulator, was based on 2 numerical methods, a montecarlo and a semi-analytical approach. Project & people management.
  • Sony Depthsensing Solutions
    Technology Engineer
    Sony Depthsensing Solutions Dec 2017 - Apr 2019
    Brussels, Brussels Capital Region, Belgium
  • Softkinetic
    Technology Engineer
    Softkinetic Oct 2017 - Dec 2017
    Brussels Area, Belgium
  • Imec
    Tsa Team Leader
    Imec Nov 2014 - Sep 2017
    Leuven
    Coordinates test chip design for technology development at imec forscaled cmos technology (down to iN5), memory and 3DIC, and research in lithography (EUV, DSA,..) and beyond cmos concepts.Reticle budget coordination (MEUROs).Leading a team of 9 experienced engineers.
  • Imec
    Pdk Team Leader
    Imec May 2012 - Nov 2014
    Leuven, Belgium
    Coordinates activity on PDK setup, Design rules definition for advanced nodes, Compact modeling for advanced technology, Testchip design for process development, maskprep and mask order.
  • Imec
    Design And Modeling Engineer / Pdk Coordinator
    Imec Sep 2010 - Aug 2012
    Leuven
    + coordinator of imec PDK for CMOS Imaging technology [Cadence/Calibre Based]+ Definition of parasitic extraction deck for advanced technologies (20nm/14nm) for both Planar and Bulk FF technology option, including local interconnect.+ PDK setup for CMOS + MEMS co-integration flow
  • Imec
    Design And Modeling Engineer
    Imec Feb 2009 - Jul 2011
    Insite Team Member @ imec Belgium (http://www2.imec.be/be_en/research/scaling-driven-nanoelectronics/insite-program.html) Design of test structures for passive/active components for modeling purposes. Setting-up of on-demand DK in the frame of CMORE activities.DK includes functionnalities of CMOS/BiCMOS/MEMS and 3D technologiesSetting-up of DRC/LVS based on Calibre software.
  • Imec
    Rf Device Eng.
    Imec Oct 2004 - Feb 2009
    Development and characterization of RF passive modules for BiCMOS and RF-CMOS technologies, modeling of RF passive components. Responsible for the design, layout, description, measurement, characterization and modeling of RF passives. for both internal and external projects. The main part of this work is made in the frame of the IST NANO-RF project (www.imec.be/nano-rf ; Exploration of the potential of 45nm CMOS for Analog/RF applications).
  • Iemn
    Post-Doctoral Fellow
    Iemn Jan 2004 - Oct 2004
    Modeling and characterization of advanced CMOS devices: Low Schottky Barrier SOI MOSFETs (LSB SOI MOSFET)
  • Universite Catholique De Louvain
    Phd. Student
    Universite Catholique De Louvain Sep 1999 - Nov 2003
    Modeling and characterization of both active and passive SOI components for RF applications (up to 110GHz).

Morin Dehan Skills

Cmos Semiconductors Ic Characterization Analog Circuit Design Rf Cadence Simulations Analog Matlab Silicon Microelectronics R&d Testing Electronics Cadence Virtuoso Mems Parasitic Extraction Compact Modeling Pdk Mixed Signal Bicmos Research And Development Drc/lvs/pex Measurements Soc Verilog Device Characterization Integrated Circuits System On A Chip Radio Frequency Nanotechnology Semiconductor Industry Integrated Circuit Design Eda Physics Process Simulation

Morin Dehan Education Details

Frequently Asked Questions about Morin Dehan

What company does Morin Dehan work for?

Morin Dehan works for Incize

What is Morin Dehan's role at the current company?

Morin Dehan's current role is Characterization Team Leader.

What is Morin Dehan's email address?

Morin Dehan's email address is mo****@****imec.be

What schools did Morin Dehan attend?

Morin Dehan attended Université Catholique De Louvain, Université Catholique De Louvain, Helha — Haute École Louvain En Hainaut.

What skills is Morin Dehan known for?

Morin Dehan has skills like Cmos, Semiconductors, Ic, Characterization, Analog Circuit Design, Rf, Cadence, Simulations, Analog, Matlab, Silicon, Microelectronics.

Who are Morin Dehan's colleagues?

Morin Dehan's colleagues are Clara Whyte Ferreira, Laurent Petitjean, Khaled Aouadi, Gilles Scheen, Ferran Ureña I Begara, Amin Rassekh, Romain Tuyaerts.

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