With over two decades of professional experience, I have consistently delivered innovative solutions in hardware/FPGA design and development. My experience encompasses the full FPGA development lifecycle, from design (defining architecture, parts selection, pin placement, risks evaluation, etc.) to development (coding, constraints, integration, etc.), followed by meticulous debugging and rigorous testing, both in simulation environments and real-world lab settings. I have excelled in technical leadership roles, driving the successful execution of complex FPGA projects through effective collaboration with cross-functional teams and firm commitment to meeting deadlines. Proficient in a diverse range of programming languages, FPGA design tools, and advanced lab equipment, I bring a pragmatic problem-solving approach and foster a culture of teamwork to achieve expected results. Technologies: Video systems, machine learning, high-speed DDR memory, PCIe, SDI, ETH/IP (ST2110), I2C, HDMI, AMD (Xilinx) / Intel (Altera), Alveo, ...Languages: VHDL, Verilog, HLS, C/C++, Python, TCL, Bash Shell, ...Tools: Vitis HLS, Vivado, Modelsim, QuestaSim, Quartus, JIRA, Confluence, Notion, Git, GitHub, BitBucket, Jenkins, Oscilloscope, Logic analyzer, ...Attributes: Innovative, self-driven, problem solving, logical thinking, pragmatic, well organized and team player.Français/English.