Long Chen Email & Phone Number

Waterloo, On, Canada (Wfh)

Northbridge IO

Waterloo, Ontario, Canada

Key Achievements/Projects:• Developed a FPGA cluster platform to support POC (Proof of Concept)• Involved in all phases of FPGA developmentResponsibilities• Developed a reusable XDMA subsystem for PCIe communication• Developed a reusable inter-FPGA communication subsystem• Defined micro-architecture for various design blocks and subsequently Verilog RTL development• Completed all the unit tests and the board-level simulation

Chongqing, China

Key Achievements/Projects:• 3 ASIC tape-outs with own designed IP inside 1) Designed function controller for UMC 55nm eFlash2) Designed BIST (built-in self-test) controller for UMC 55nm eFlash3) Designed Corsight subsystem for ARM Cortex-A 17 CPU• No ECO after tape-out• Enable CPU hardcore automatic critical path optimization flow for competitive PPAResponsibilities: • Defined micro-architecture for various design blocks and subsequently Verilog RTL… Show more Key Achievements/Projects:• 3 ASIC tape-outs with own designed IP inside 1) Designed function controller for UMC 55nm eFlash2) Designed BIST (built-in self-test) controller for UMC 55nm eFlash3) Designed Corsight subsystem for ARM Cortex-A 17 CPU• No ECO after tape-out• Enable CPU hardcore automatic critical path optimization flow for competitive PPAResponsibilities: • Defined micro-architecture for various design blocks and subsequently Verilog RTL development• Performed development activities such as Lint, Synthesis, Formal Verification, and Static Timing Analysis and CDC check• Created timing constraint files (SDC)• Collaborated with the UVM verification team on test plan and coverage closure for random verification• Integrated RTL design into FPGA and subsequently FPGA development, such as synthesis implementation and bit generation• Collaborated with software team on FPGA verification for ASIC design• Integrated ARM CoreSight components and Cortex-A CPU into a subsystem using AMBA Designer• Performed CoreSight Simulation• Supported layout, product, test and marketing engineers through various phases of product development Show less

Guangdong, China

Key Achievements/Projects:• 1 ASIC tape-out (contribution: FPGA test - the IP is a memory controller used in a network processor)Responsibilities: • Analyzed ASIC gate count and select suitable FPGA device• Converted the ASIC design into FPGA device • Created clock generator in FPGA• Created Perl script to convert ASIC SRAM files into FPGA block ram files• Modified ASIC SDC to fit FPGA design• Used LSF to get best result of synthesis and… Show more Key Achievements/Projects:• 1 ASIC tape-out (contribution: FPGA test - the IP is a memory controller used in a network processor)Responsibilities: • Analyzed ASIC gate count and select suitable FPGA device• Converted the ASIC design into FPGA device • Created clock generator in FPGA• Created Perl script to convert ASIC SRAM files into FPGA block ram files• Modified ASIC SDC to fit FPGA design• Used LSF to get best result of synthesis and implementation.• Analyzed FPGA timing report and fix violations.• Worked with ASIC design team to debug test failures at FPGA test Show less

Sichuan, China

Responsibilities: • Contributed to the design of demo communication system using Tera Hertz Technology• Studied PCIe protocol and apply Xilinx PCIe endpoint IP into the demo communication system• Designed test program using MFC

Master'S Degree, Electrical, Electronics And Communications Engineering

• Thesis: Program Development of AM OLED Driving Experimental Platform and Demo System

Bachelor'S Degree, Electronics Science And Technology

• Thesis: Design of AM OLED Drive IC Test System Based on FPGA