Mike Bruce Email & Phone Number

Responsible for strategic planning of failure analysis for new products and technologies, identified gaps and implemented projects to address the gaps. • Commercialized award winning “Soft Defect Localization” (SDL) technology, distributed worldwide and known as the “bread and butter” debug technique to find defects and improve reliability and performance of microprocessors. In collaboration with Semicaps Ltd. (Singapore), designed and built a new generation scanning optical microscope with turnkey capability for SDL.• Management oversight responsibility for bringing new technologies for debug of microprocessors: Managed design of new optical based thermal control techniques for TRE and SDL, thermography for measuring temperature in microprocessors, applications of Atomic Force Microscopy and Near Field Scanning Optical Microscopy (NSOM), and studies of optical interactions in semiconductor devices. • Conducted tool and technique gap analysis for 65, 45, and 32nm technologies.

• In collaboration with Sandia National Labs, developed "Resistive Interconnect Localization" (RIL) and “Soft Defect Localization” (SDL) that can quickly identify resistive interconnects, design marginalities and other soft defects. Reduced fault isolation time by well over 50%. Received best paper at ISTFA and awarded three patents which have been licensed to major Semiconductor companies. • Developed one of the first picosecond Time Resolved Emission (TRE aka PICA) systems in the semiconductor industry outside of IBM. One of the pioneers of the single element photo-detector approach that has become mainstream in the industry. Three highly cited (as prior art) US Patents awarded for this key technology. This technology was critical to AMD’s success (K8) when they moved into SOI as the Laser Voltage Probe (LVP) became obsolete.

• Founding member for start up lab and group dedicated to development of new tools and techniques for failure analysis.• Rapidly added backside capability when AMD moved into flip-chip circuits. Backside capabilities evaluated and implemented include backside polishing, Anti-reflective coatings (ARC) for backside imaging, TIVA, LIVA and backside photon-emission microscopy.• Scientific lead for evaluating a new tool called Laser Voltage Probing (LVP) for acquiring waveforms through the backside of silicon. LVP was a difficult tool to work with; however, the scientific insights and understanding were critical for the successful use of the tool and design debug of our K6 and Athlon processors.

• Responsible for reliability qualification of new FAB processes and evaluating reliability impact of process changes. • Managed reliability lab with two techs, greatly expanded the lab’s capability by adding package level testing for HCI, TDDB, and Electromigration. • Implemented new tests and conducted wafer level reliability analysis for electromigration (Isothermal and SWEAT), HCI (Isubmax), CV (trap charges and mobile ions), and Gate Oxide (VRDB, QDB and Vt fluence).

Researched electron impact ionization techniques with Professor Russell Bonham, Dept. of Chemistry. One of the first researchers to develop a multi-parameter mass spectrometer capable of measuring ion-ion and ion-electron (EELS) coincidences (termed "Covariance Mapping Mass Spectroscopy") [J. Phys. B: At. Mol. Opt. Phys. vol. 27, 5773 (1994)]. The correlations revealed common molecular bonding relationships (stoichometry) among dissociated by-products. Results for CF4 showed the dominance of producing neutral fluorine which helped explain why CF4 is such an efficient etchant gas for Si in plasmas.

Phd, Physics - Atomic, Molecular, Optical

Dissertation: "A Study of Reactive Quenching of Xenon by Chlorides using Two-Photon Laser Excitation" Supervising Professor: Dr. John W..

Bs, Physics