Mladen Slijepcevic Email & Phone Number

Munich, By, De

Munich, Bavaria, Germany

Cycle-accurate virtual prototyping (SystemC/C++)

Munich Area, Germany

As being part of the RF Virtual Prototyping (VP) team I am working on improving C++/SystemC simulator for pre-silicon verification of RF chips. My responsibilities include various flow, tooling and codebase innovation topics as well as writing simulator libraries. (C++/SystemC, Python and CMake)

Munich Area, Germany

As the part of the RF Virtual Prototyping (VP) team I was working on the RF transceiver equivalent VP architecture. Main daily job was to design and develop pre-silicon SW verification platform modules. Responsibilities: Implementing, verifying and integrating C++/SystemC-based behavioral models at different abstraction levels, fulfilling the module specification. This includes verification with test benches for model qualification and sign-off, adaptation, automation and optimization of the VP development infrastructure.

As a part of CAOS (Computer Architecture and Operating Systems) group in BSC, I was working on the novel multi/many core architectures for future Critical Real-Time Embedded Systems. Responsibilities: Research and development of hardware and software techniques to support the use of multi/many-core processors in safety-critical Real-Time Embedded Systems, techniques to deal with reliability issues, and implementation of those techniques within cycle-accurate SoCLib simulation framework (SystemC/C++).

Gothenburg, Sweden

During the Internship was involved in the digital design of the manycore processor for the next generation processors in the space industry. I joined the European Space Agency (ESA)-funded project.Responsabilities: Adapting LEON-based multicore system with high-performance features, making system design synthetisable, design and implementation of additional modules, testing design and writing low-level software (used VHDL and C).

Bucaramanga, Colombia

Main responsibility was digital design of the automatic control system for loading bottles (VHDL/C++). In additional, I took part at state robotics competition and won the medal for the best novice competitor (C/C++).

Belgrade, Serbia

Designed an embedded system for enabling Scada systems to read power meter (MODBUS protocol to HLDC, and vice versa). Full hardware design with Philips LPC2131 microcontroller. Software design included implementation of MODBUS protocol.

Doctor Of Philosophy (Ph.D.), Computer Architecture

PhD Thesis: Probabilistically time-analyzable complex processor designs (https://upcommons.upc.edu/handle/2117/114436) Advisors: Francisco.

Master'S Degree, Electrical Engineering And Computer Science, Gpa: 10 (On The Scale 5-10)

Activities and Societies: EESTECM.Sc. thesis: "Benefits of cache partitioning in multi-core processor for hard real-time systems"

Bachelor Of Science (Bsc), Electrical Engineering And Computer Science, Gpa: 8.91 (On The Scale 5-10)

Activities and Societies: EESTECDiploma thesis - Protocol converter

High School, Grade: 5 Out Of 5

Activities and Societies: Regional Center for young talents - physics, Petnica Science Center - Applied physics and electronics seminar.