Managing a team of amazing security architects responsible for ensuring world class security across Apple Platforms: including SoCs, factories, SW updates, supply chain, biometrics and much more, as well as for definition, development and integration of 3rd party custom silicons in apple platforms.

* Leading a team of senior architects responsible for architecture and integration of Security and Virtualization Technology streams across PC client ecosystem encompassing Intel SoCs, leading Operating Systems and OEM platforms.

* Responsible for identification and evaluation of threats to user privacy across all Apple platforms iPhone, iPad, Apple Watch, Macs etc., define platform level solution for prevention and/or mitigation of such threats, and drive the solution through various functional teams across Apple• Drove SW personalization and revocation arch in Apple T2-Macs and Apple audio products (AirPods and Beats series); managed design and implementation across CoreOS, Crypto Services, and Infrastructure teams• Analyzed vectors exploitable by hackers to extract Apple IP secrets for fabricating complex attacks. Defined architecture and a cross-generation implementation plan for closure of identified gaps, and drove it across functional (SoC, Labs, Dev-Eng and DFT) and product teams (iPhone, iPad and Macs)• DRI for researching academic attacks, that could lead to user data exposure, and for leading preemptive platform level solutions to mitigate such threats using sophisticated platform level constructs - Custom Silicon, OS, and cryptographic enhancements into HW design• Currently leading definition for next gen secure infrastructure for delivery of Apple assets - software, part specific secrets etc. - in hostile environments (factories, vendors) and high value environments (data center), protected from external and internal attackers

* Led a team of senior architects in the field of security, embedded OS Architecture, performance, and power management, to deliver architecture for Intel® Converged Security Engine - foundation for variety of value added security and manageability solutions on Intel platforms - shipped in over 300M units per year* Prioritized architecture roadmap and definition with internal business units and product mgmt. teams; and enabled engineering teams to deliver solutions across 8 product lines in a given year* Built and extended relationship with Apple, Google, Microsoft, Lenovo et al, towards enablement of current gen security engine as well as requirements disposition for future generations* Collect product requirements from internal business units - PC and Mobile client groups and server group - and disposition them over multi-year roadmap of Intel products with intercepts across various platform level technologies and features* Designed several key features - power management, Secure FW recovery, secure debug etc. – for Intel security engine, a key component of Intel vPro brand, providing ASP uplift of $2B per year

Responsible for core FW architecture work for Intel ® Manageability Engine and core security engine based solutions. Work closely with HW Architects for defining solutions for future Intel in HW and FW products.* Led architecture definition for security engine for 2016 Intel mobile platform with specific ownership of secure FW update and recovery (DnX), secure unlock and debugging, and secure provisioning aspects* Co-designed infrastructure for Intel ® Manageability Engine, used in several Intel technologies such as AMT, Media Vault etc., resulting in annual revenue of $600M through ASP upsell.• Designed SKU management FW and HW architecture allowing Intel marketing to efficiently segment the market and generate additional revenues of ~$1.4B over past 4 years• Co-led power management architecture in chipset including HW and SW interfaces contributing to ~10x reduction in idle power of the chipset over a single generation

Defined power management architecture for manageability engine kernel, including “fair share” scheduling, automatic speed-step and tick-less scheduler resulting in ~80mw savings in chipset powerDesigned method to gracefully boot and shutdown the ME sub-system including FW modules behavior as well as hardware behavior, such as isolation, reset state, D-state etc., enabling inclusion of independent ME sub-system without impacting any legacy PC architecture constructsLed architecture definition of Intel Capability Licensing Service enabling in-field upgrades of Intel chips, with potential savings of ~30M per year by removing need for managing HW SKUs

* Co-owner of High Definition (HD) Audio specification - an industry spec for audio codecs for PC platforms* Defined content protection architecture extension to HD Audio specification. The architecture enabled delivering premium content over HDMI audio codec discoverable over HD Audio interface* Created strategy for enabling HD Audio HDMI extension across Intel chipset hardware and Microsoft Windows operating system and subsequently represented Intel in discussions with Microsoft to drive acceptance of strategy and subsequent enabling of HD Audio HDMI extension across Intel chipsets and Windows OS * Drove acceptance of the architecture as well as industry enabling by working with Microsoft in OS space and with Silicon Image et al in digital audio codec space

Defined BIOS architecture spec for support of Intel Manageability Engine in vPro platforms and delivered reference code to OEMs resulting in significant reduction in enabling costsDefined architecture for self healing platform (patented) wherein an embedded entity detects the corruption of platform FW and recovers it by downloading from a central server over secure connection