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Michael Miller Email & Phone Number
Networking IP Solutions Architect at Intel
at
Altera
1 work email found
@intel.com
6 phones found area 408
LinkedIn matched
✓ Verified Jun 2026
4 data sources
Profile completeness 100%
Current company
Role
Networking IP Solutions Architect at Intel
Location
Saratoga, California, United States
Company size
Who is Michael Miller? Overview
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Quick answer
Michael Miller is listed as Networking IP Solutions Architect at Intel at Altera, a company with 10 employees, based in Saratoga, California, United States. AeroLeads shows a work email signal at intel.com, phone signal with area code 408, and a matched LinkedIn profile for Michael Miller.
Michael Miller previously worked as Networking IP Solutions Architect at Intel Corporation and Chief Technology Officer at Mosys, Inc.. Michael Miller holds Bs Cs, Software, Computer Architecture from California Polytechnic State University-San Luis Obispo.
Company email context
Email format at Altera
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{first}.{last}@intel.com
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AeroLeads found 1 current-domain work email signal for Michael Miller. Compare company email patterns before reaching out.
Profile bio
About Michael Miller
Over 35 years of experience in product definition, creation, and applications work in the semiconductor and system businesses. His career has focused on innovating new products at the intersection of algorithms, software, and hardware in the areas of computing and networking. Through his career he has held engineering positions in software, hardware, logic design, system architecture, compilers, applications, OS porting, I/O drivers, board design, IC product definition, evangelizing and management. Most recently he has held CTO titles at IDT and MoSys.Career highlights:He personally conceived and created a new class of processor, Graph Memory Engine (GME), which he prototyped in C/Python and wrote a TCAM compiler in C to program it. GME can enable a wide range of classification applications from AI to database search and networking requiring high capacity and performance.Assembled and managed a cross functional team to productize the GME Stellar Mercury product composed of FPGA RTL, algorithm architects, software, firmware, and system engineers. Resulted in a 200Mb TCAM alternative product sufficient for 2 x 100GE firewall. Architecture will scale beyond 1Gb capacity and support for multi-terabit/s data rates.Architected a new class of very high access rate, high capacity, low latency SerDes attached monolithic memory resulting in 3 generations of product.Incubated a TCAM memory product line at IDT which was ultimately acquired by NetLogic for $90M in 2009.Conceived and patented the protocol which was ultimately defined the industry standard JTAG protocol that exists on most all silicon produced today.47+ US patents in system, software, hardware, protocols and chip architecture, cited by 1,500 patents from companies including Intel, IBM, Cisco, Micron, F5, and SanDisk. 14+ publications including IEEE, IEEE Mirco, HotChips, EDN, EE Times, MemCon, Embedded, OFC and Linley Tech Conferences.Specialties: Systems architecture, product architecture prototyping with C/Python, product definition, product verification, technical marketing and applications, managing cross functional software and hardware development, technology innovation, and IP acquisition
Listed skills include Semiconductors, Asic, Product Development, Ic, and 27 others.
Current workplace
Michael Miller's current company
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Altera
12 roles · 48 years
Michael Miller work experience
A career timeline built from the work history available for this profile.
Networking Ip Solutions Architect
CurrentResponsible for leading a team of hardware and software engineers developing networking search IP.
Aug 2022 - Present
Chief Technology Officer
Responsible for raising the value of MoSys by defining, creating and promoting high level systems oriented products incorporating silicon, software and hardware in cutting edge markets such as Machine Learning, Edge Computing, Datacenter Acceleration, Genomics and Network Packet Processing.
May 2019 - Aug 2022
Vp Of Technology Innovation And Systems Applications
Responsible for setting product and technology direction for MoSys as well as defining new Serial and Memory products. Focused on high speed 10 billion accesses per second 1 Gb memory ICs with 25Gbps serial interfaces for the networking and storage markets. The product incorporated 32 RISC cores to enable intelligent memory operations such as search and AI.
Jun 2009 - May 2019
Owner/President
Micasys
Independent consultant to the semiconductor and related industries. Product direction planning, product defintion, system applications, and design consulting: ASIC or system design implementation and management, project management, design and marketing analysis, business intelligence application support.
Dec 2008 - Jun 2009
Cto
Served as the company's chief technical officer (CTO) and vice president of Systems Technology, responsible for systems-level and chip design technical issues. Worked with product lines in anticipating industry trends, evaluating new technologies and customer requirements, product definition and design of new products, and creating system-level reference.
2001 - Dec 2008
Vice President Of Engineering
Responsible for leading engineers in product definition and customer support in the areas of communications products such as switching and network interfaces. Team created reference designs and device drivers. Product responsibility included ATM PHY, SAR and switches.
1997 - 2001
~4 yrs
Director Of Engineering
Lead team creating RISC software support tools, boards and subsystem modules. Support included BSD Unix port, "C" compliers, assembler, and debug monitors. Hardware designs included accelerator card and CPU modules.
1989 - 1997
~8 yrs
Engineering Manager
Lead team performing product definition and applications engineering. Responsible for Bit Slice, Advanced Logic, and specialty memories.
1985 - 1989
~4 yrs
Manager Of Software
Step Engineering
Managed software department developing microcode and debug tools. Job included applications code, OS ports and driver code for SCSI disk drive systems.
1983 - 1985
~2 yrs
Manager Of Software Development
Nara Technologies
Managed software team porting OS and developing 3D graphics rendering software.
1982 - 1983
~1 yr
Applications And Product Definition Engineer
Provided factory applications support and product definition of microcodable building block devices (2900 bitslice family). Performed logic design and verification functions. Conceived of and wrote an HDL compiler to describe and verify logic. Granted first serial diagnostic patent.
1978 - 1982
~4 yrs
2 education records
Michael Miller education
Bs Cs, Software, Computer Architecture
California Polytechnic State University-San Luis Obispo
Mathematics And Computer Science
San José State University
FAQ
Frequently asked questions about Michael Miller
Quick answers generated from the profile data available on this page.
What company does Michael Miller work for?
Michael Miller works for Altera.
What is Michael Miller's role at Altera?
Michael Miller is listed as Networking IP Solutions Architect at Intel at Altera.
What is Michael Miller's email address?
AeroLeads has found 1 work email signal at @intel.com for Michael Miller at Altera.
What is Michael Miller's phone number?
AeroLeads has found 6 phone signal(s) with area code 408 for Michael Miller at Altera.
Where is Michael Miller based?
Michael Miller is based in Saratoga, California, United States while working with Altera.
What companies has Michael Miller worked for?
Michael Miller has worked for Altera, Intel Corporation, Mosys, Inc., Micasys, and Integrated Device Technology, Inc..
Who are Michael Miller's colleagues at Altera?
Michael Miller's colleagues at Altera include Levent Ocaktan and Ozer Pilge.
How can I contact Michael Miller?
You can use AeroLeads to view verified contact signals for Michael Miller at Altera, including work email, phone, and LinkedIn data when available.
What schools did Michael Miller attend?
Michael Miller holds Bs Cs, Software, Computer Architecture from California Polytechnic State University-San Luis Obispo.
What skills is Michael Miller known for?
Michael Miller is listed with skills including Semiconductors, Asic, Product Development, Ic, System Architecture, Soc, Hardware, and Intellectual Property.
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