FundraisingMarketingBusiness development

• Focused on fund raising of high tech startups and semiconductor companies.• Raised around 1 billion USD for Vibe, Houmo(后摩智能), MetaX(沐曦集成电路), ESWIN(奕斯伟计算), Clounix(云合智网), PPIO, JingOS(鲸鲮科技).

• Hybrid role that combines FAE/TSM with technical sales on IPs and customized ASICs• Work directly with potential customers to provide various pre-sales activities to develop and win new licensing of RISC-V based CPUs.• Gather customer requirements, feedback, and needs and provide timely input back to Product and Engineering Management teams.• Support marketing activities in the form of conferences, trade show exhibits, etc.

RISC-V Based CPU Designer/Architect• Took ownership of a multi-threading in order single issue CPU’s pipeline architecture and design• Worked on full pipeline control logic including decode, instruction queue, data forwarding, hazard detection, branch/exception flush and instruction retirement

ARM-V8 Based 3-way Out-of-Order CPU Design• Optimized current out-of-order pipeline micro-architecture• Coded RTL for Reorder Buffer, Free List and Register Alias Table• Worked with verification team to make sure CPU function correctly as one of the major debug team members• Worked with backend team for power, area and timing optimization• Worked with compiler and performance modeling team to improve CPU performanceFinal Level Cache Controller Design• Defined… Show more ARM-V8 Based 3-way Out-of-Order CPU Design• Optimized current out-of-order pipeline micro-architecture• Coded RTL for Reorder Buffer, Free List and Register Alias Table• Worked with verification team to make sure CPU function correctly as one of the major debug team members• Worked with backend team for power, area and timing optimization• Worked with compiler and performance modeling team to improve CPU performanceFinal Level Cache Controller Design• Defined architecture, coded and verified each module of the design• Analyzed latency, bandwidth and performance of this cache controller• Defined next generation product through analysis with performance modeling team Show less

• Floating Point Divider• Studied algorithm, advantages and implementation overhead of radix-2, 4, 8, and 16 integer/floating point divider; presented to the CPU team manager and members to decide final selection of radix divider for the current computing unit.• Analyzed old radix-2 and radix-4 RTL design; identified disadvantages, reason for slow timing and extra area problem in the RTL code; prepared new design plan, structure and diagram.• Performed RTL code writing for the new… Show more • Floating Point Divider• Studied algorithm, advantages and implementation overhead of radix-2, 4, 8, and 16 integer/floating point divider; presented to the CPU team manager and members to decide final selection of radix divider for the current computing unit.• Analyzed old radix-2 and radix-4 RTL design; identified disadvantages, reason for slow timing and extra area problem in the RTL code; prepared new design plan, structure and diagram.• Performed RTL code writing for the new radix-8 design; completed integer, single and double precision floating point division test cases to ensure the correctness of the new design and met the timing requirement after synthesis.• Finished editing full design documentation including algorithm, analysis, coding explanation and special function module definition Show less