Student Engineer
Wrote 2000+ lines of design, verification, and test SystemVerilog for the upcoming NASA NEO-Surveyor mission. Designed FPGA architecture for data-processing, encoding, and downlink to KA-Band radio frequency used to transmit the satellite’s image and diagnostic data to Earth. Improved reconfigurability for the institute-standard, Reed-Solomon encoder core which will lead to a reduction in engineering time for future satellites.