Nathan Muller

Nathan Muller Email and Phone Number

IC Layout Design Engineer @ Micron Technology
boise, idaho, united states
Nathan Muller's Location
Boise, Idaho, United States, United States
Nathan Muller's Contact Details

Nathan Muller work email

Nathan Muller personal email

n/a
About Nathan Muller

Through my experiences in work and school I have gained a love for life-long learning. I am a Layout Design Engineer at Micron. I have enthusiasm for the work and am driven to gain and implement the knowledge and skills necessary to be a productive and effective professional.I have skill sets in netlist to GDSII digital design and schematic to layout custom design, encompassing physical layout, timing closure, and verification. My expertise extends to programming/scripting languages such as TCL, SKILL, Python, Verilog, and C. Additionally, I am proficient in design tools like Cadence Innovus, Virtuoso, Quantus, and Siemens EDA Calibre.

Nathan Muller's Current Company Details
Micron Technology

Micron Technology

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IC Layout Design Engineer
boise, idaho, united states
Website:
micron.com
Employees:
20793
Nathan Muller Work Experience Details
  • Micron Technology
    Layout Design Engineer
    Micron Technology Sep 2024 - Present
    Boise, Idaho, United States
    I design physical layout for DRAM memory IC circuits. My experience in a range of industry standard EDA tools and associated programming/scripting languages is applied to advanced designs.
  • Onsemi
    Digital Physical Design Engineer
    Onsemi Apr 2023 - Sep 2024
    Pocatello, Idaho, United States
    I specialize in the entire integrated circuit (IC) physical design process, spanning from RTL (Register Transfer Level) to GDSII (Graphic Data System II) for both individual blocks and top-level digital and mixed-signal devices. My expertise includes floorplanning, power grid analysis, place and route, clock tree synthesis, timing closure, GDSII stream-out, and physical verification (DRC, LVS, Antenna, ERC, DFM) to ensure accurate delivery for reticle data preparation.
  • Onsemi
    Layout Engineer Intern
    Onsemi Aug 2022 - Apr 2023
    Pocatello, Idaho, United States
    I work with experienced engineers to learn and understand the tools and concepts of digital layout design and implementation within the semiconductor manufacturing industry.
  • Brigham Young University - Idaho
    Teaching Aide
    Brigham Young University - Idaho Sep 2021 - Dec 2021
    Rexburg, Idaho, United States
    Oversaw lab efforts for 30 electric circuit analysis students and provided grading and feedback on submitted lab reports.
  • Ups
    Package Dispatch Supervisor
    Ups Oct 2019 - Dec 2021
    Rexburg, Idaho, United States

Nathan Muller Education Details

Frequently Asked Questions about Nathan Muller

What company does Nathan Muller work for?

Nathan Muller works for Micron Technology

What is Nathan Muller's role at the current company?

Nathan Muller's current role is IC Layout Design Engineer.

What is Nathan Muller's email address?

Nathan Muller's email address is na****@****emi.com

What schools did Nathan Muller attend?

Nathan Muller attended Brigham Young University - Idaho.

Who are Nathan Muller's colleagues?

Nathan Muller's colleagues are Jaswanth Ikkurthi, Pui Ying Choy, Jian Jie Chok, Stone Zhu, Soumya Bitla, Vlado Noveski, Sabit Sundar Kar.

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