Acquired skills and knowledge:- Thermoelectric generator for energy harvesting in microsystem technology (fundamental and fabrication using Poly-SiGe semiconductor as the thermoelement).- Wafer bonding technologies, e.g., Transient Liquid Phase (TLP) wafer bonding. - Pulse and forward-reverse pulse electroplating on 6” and 8” Si wafer.- Reliability investigation of a thin film and a bond solder for high temperature applications.- Mechanical and electrical characterizations of a bond solder.- Metal-Semiconductor contact characterization (Transfer-Length Method).- Thin film characterizations: XRD analysis (Seifert 3000PTS), SEM analysis (Carl Zeiss Ultra Plus), TEM analysis, EDX analysis, 4-probe measurement.Practical experiences:- Wafer processing in order to perform wafer bonding.- Wafer processing to fabricate a Transfer Length Method (TLM) structure.- Wafer bonding using Süss MicroTec SB6, including creating a bond program.- Daisy chain structure fabrication using a wafer bonding technique.- Design a lithography mask for 6” Si wafer using AutoCAD.- Wafer dicing (CAP and FINAL dicing) using DISCO DAD3350.- Design an electroplating tool for 6” and 8” Si wafers using Autodesk Inventor.- Nickel (Ni), Tin (Sn), and Indium (In) deposition using pulse electroplating.- Dry etching (Si, Si oxide, DRIE, RIE) using Sentech SI500.- Lithography (photoresist coating, baking, exposure, development, and EBR).- Ion-beam etching of metallic thin films using OXFORD Instruments PC3000.- O2 plasma ashing for photoresist cleaning and creating a hydrophilic surface (Descum) using Sentech SI100.- Cooperate and collaborate with project partners (to define a design for a bond and a TLM microstructure, to perform wafer processing and test microstructures investigation).- Create a project report regularly and present it in a project meeting periodically.- Hold lectures: Electroplating, Wafer Bonding Technology and Thermal MEMS, and supervise a master thesis and Hiwi.

Acquired skills and knowledge:- Silicon wafer process for eutectic MEMS wafer-level bonding/packaging.- Hermeticity investigation of MEMS wafer-level packaging using pressure cooker test, gross-leak test, humidity test, thermal cycle test, high pressure test.- Mechanical investigation of MEMS wafer-level packaging.- Wafer-level packaging technologies, such as polymer packaging, thin film packaging, and LTCC packaging.- Wafer grinding (coarse, fine, ultra-fine).Practical experiences:- Create a wafer processing flow for a MEMS release and a wafer bonding.- Visual inspection of fabricated structures on 6” and 8” Si wafers after each wafer processing step.- Wet chemical etching of thin films (Au, Ti, W, Al, Si oxide).- Structure thickness measurement using Dektak and White Light Interferometer.- Wafer thinning/grinding using a DISCO DFG8540.- Shear test of bonded dies using a DAGE BT200PC.- Capacitive-Voltage (CV) measurement of RF-MEMS membrane.- Pressure Cooker Test and Gross Leak Test of bonded dies.- Lithography mask design using a Cadance Virtuoso Layout Editor.- Sacrificial layer etching to release a MEMS structure.- Critical point dryer after sacrificial layer etch using Tousimis Automegasamdri®-916B, Series C.- Manage and lead some process engineers to supervise wafer processing steps.- Cooperate and collaborate with project partners from Germany and EU countries (to optimize a wafer process, to perform test microstructures characterization, and to define a design of a glass cantilever).- Create a project report regularly and present it in a project meeting periodically.- Supervise a master thesis and an internship.

Adaptation and development of Indonesian National Standard from international standards in the safety of nuclear energy and radioactive applications in Indonesia.