Neel Shah Email & Phone Number

Santa Clara, California, Us

Working on latest and greatest hardware security technologies!

Santa Clara, California, Us

• Working on secure architecture/standard for Intel's current and next generation products (server, client, etc). [resulted in several patents, internal conference papers and divisional/group recognition awards].• Responsible for developing security architecture for Intel’s next generation server SoCs, with a special focus on interactions between security and debug/test/reset/fuses throughout Intel’s product development lifecycle• Perform threat and vulnerability analysis on new features/IPs and on the entire SoC, analyze HW interactions and flows for security risks, and ultimately drive hardware architecture approval through central architecture management board• Develop end-to-end Intel and customer debug security (lock and unlock) flows, involving interactions from product architects, designers, pre/post-silicon validators, and related customer interactions.

Boston, Ma, Us

• Analyze Side-Channel Attacks (SCAs) to discover vulnerabilities in computer hardware using power trace method [resulted in a publication and a poster]• Calculate and analyze the correlation between power traces and sensitive data, such as cipher-text and plain-text, using Pearson’s product-moment correlation coefficient and Hamming distance• Develop parallel framework of correlation analysis in OpenCL and CUDA which significantly improved performance • Investigate countermeasures, such as addition of a random number (noise), against SCAs and evaluate their responses

Boston, Ma, Us

• Developed object detection and face recognition applications for Defense and Security purposes [resulted in a poster]• Utilized OpenCL and C++ to program heterogeneous platforms such as GPUs and CPUs• Compared interest points using Computer Vision algorithm called Speeded Up Robust Features • Added a feature to algorithm designed to generate a list of similar comparison interest points between two images/videos• Analyzed performance for 9 kernels of data between GPU and CPU, resulting in a change in 2 kernels to enhance run-time performance

Boston, Ma, Us

• Provided in-person and phone application support to students and faculty• Upgraded and serviced lab computers and software to maintain performance and application integrity

Mclean, Va, Us

• Analyzed Differential Electromagnetic Analysis (DEMA) technique to prevent side channel attacks on cryptographic devices• Evaluated power leakage and EM radiation of electronic devices using DPA and DEMA• Composed Python script to collect electromagnetic field data using EM probe on different locations of the device • Wrote signal and data processing code to compute FFT, filtering, and spectrogram in Python • Constructed code to extract and verify an AES encryption key using AES S-box selector and Difference of Mean • Designed drop buffer RTL component for bi-static radar using VHDL and SystemVerilog • Performed verification using Universal Verification Methodology on Altera Stratix V FPGA• Utilized GIT, a distributed version control system, to maintain updates for projects involving 10 engineers

Santa Clara, California, Us

• Collaborated with the design engineering team to develop state-of-the-art next generation x86 AMD CPU core, specifically designing and optimizing Instruction Cache Unit (ICU) • Utilized commercial CAD tools for synthesis, timing analysis, and circuits analysis• Debugged and improved the hardware design to meet strict design specifications such as timing, power, and reliability• Designed and gained approval for the ICU, which is now taped-out for prototype production

Newton, Massachusetts, Us

Electrical And Computer Engineering, Engineering

Master'S Degree, Electrical And Computer Engineering