I am a 8-years experienced hardware design engineer, specialized in Static Timing Analysis (STA) for semiconductor chips. Having a solid background covering from post-synthesis to post-PnR STA, together with SDC (Synopsys Design Constraint), I have achieved several successes in projects including Automotive MCU (Micro Controller Unit), General MCU, ASIC (Application Specific Integrated Circuit) and CIS (Car Information System).With my current position as Manager for STA, I have the opportunity to further enhance my impact to our organization by providing technical mentoring as well as mindset and soft skill education to my members.