Nitin Bhatnagar Email & Phone Number

Decade+ of extensive industry experience in Functional verification of Soft IPs, Subsystems, SOC, ASICs, VIP development and validation .* Expert in latest industry standard IP verification methodologies (OVM/UVM/eRM) & languages (System Verilog, Specman "e", Verilog). * Hands on expertise in unit/system level test planning, SV/UVM based test bench infrastructure development (DV Automation, simulation/regression setup), coverage (code coverage & functional coverage), performance/power analysis, GLS.* Lead verification efforts by contributing towards effective self checking methodology development, efficient test planning, scheduling and tracking.* Worked on multiple programs (IP/FPGA/Subsytem/SOC) from architecture to tape out. Delivered First pass Silicon success from architecture to tape out.* Proven track record for managing projects executed across multi-sites in different time zones.* Worked on various industry standard EDA tools, used in verification.* Published multiple papers & articles. * Experience in working with Systems, Architecture, Design, Validation & marketing teams. Multi-sites project execution in in different time zones.* Experience in mentoring engineers, team building & hiring new engineers.* Exposure to working with different customers from understanding the requirements to providing complete solution (product and design services) directly contributing to revenues of the organization.Specialties: IP/ASIC/SOC Verification-* Coverage driven verification (eRM/OVM/UVM)* Protocols SATA, USB, AHB, AXI, Ethernet & SONET* Functional/Gate Level Verification, ATE test cases & Resimulation for tester pattern.

Listed skills include Amba Ahb, Usb, Axi, Systemverilog, and 35 others.