Nitten Kumar Email & Phone Number

Skilled in Physical Design, Power Planning, Static Timing Analysis (STA), Clock Tree Synthesis (CTS), Design Rule Checks (DRC), Layout vs Schematic Checks (LVS), Logic Synthesis, RTL Design (Verilog) and simulation. Working experience majorly on EDA tools like Cadence - Innovus, Virtuoso, Synopsys - Design Compiler, Primetime, Formality, Mentorgraphics - Calibre and many other tools. Working at Indian Institute of Technology - Jodhpur (IIT Jodhpur). In IIT Jodhpur he is working in project funded by MEITY, Government of India. In Project he is responsible for Layout Design and working in the Physical Design team.Nitten has done Master in Technology (M.Tech) in VLSI Design from ITM University Gurgaon and Bachelor in Technology (B.Tech) in Electronics and Communication Engineering from RGPV, Bhopal.

Listed skills include Verilog, Cadence Virtuoso, Xilinx Ise, Microsoft Word, and 17 others.