I am an FPGA firmware engineer with 19 years of VHDL experience.For my first nine VHDL years I worked in the world of science, focusing on read-out logic for particle-accelerators like CERN or FAIR. In this time, I founded and managed two firmware teams. The first team concentrated on dynamic partial reconfiguration and its two main applications: runtime-adaptability and radiation tolerance. The second team developed and maintained a read-out controller board for the CBM experiment of FAIR.During that time, I also contracted for IBM as an IT trainer, teaching AIX to administrators. And I taught VHDL papers at the universities of Heidelberg and Frankfurt.After I finished my PhD, I decided it is time to gain some new experience. I moved to New Zealand and changed into the commercial FPGA world, namely Endace. For five years, I was a member of the firmware team responsible for development and maintenance of the DAG cards.In 2017 I changed back to the world of research, namely the AUT. Here, I was responsible for the design and development of FPGA firmware for the Square Kilometre Array (the world's biggest radio telescope, currently under construction). I also taught multiple computer science papers at AUT's South Campus.In 2019 I rejoined Endace as a member of the FPGA R&D team, mostly focussing on the development of the new NYX cards.In my freetime I try to spend as much time as possible in New Zealand's wonderful country side - hiking, rock climbing, snow boarding, horse riding...
Listed skills include Fpga, Vhdl, Verilog, Radiation Tolerance, and 29 others.
