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Norm Zhou Email & Phone Number

Realtime AI Reasoning at Deductive AI
Location: Fremont, California, United States 13 work roles 2 schools
1 work email found @fb.com 1 phone found area 650 LinkedIn matched
✓ Verified Jul 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email · 1 phone

Work email n****@fb.com
Direct phone (650) ***-****
LinkedIn Profile matched
3 free lookups remaining · No credit card
Current company
Role
Realtime AI Reasoning
Location
Fremont, California, United States

Who is Norm Zhou? Overview

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Quick answer

Norm Zhou is listed as Realtime AI Reasoning at Deductive AI, based in Fremont, California, United States. AeroLeads shows a work email signal at fb.com, phone signal with area code 650, and a matched LinkedIn profile for Norm Zhou.

Norm Zhou previously worked as Founding Engineer at Deductive Ai and Senior Engineering Manager at Meta. Norm Zhou holds Master Of Science - Ms, Computer Architecture from University Of California, Berkeley.

Company email context

Email format at Deductive AI

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{first_initial}{last}@fb.com
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AeroLeads found 1 current-domain work email signal for Norm Zhou. Compare company email patterns before reaching out.

Profile bio

About Norm Zhou

Norm Zhou is a Realtime AI Reasoning at Deductive AI. He possess expertise in algorithms, debugging, fpga, asic, soc and 33 more skills.

Listed skills include Algorithms, Debugging, Fpga, Asic, and 34 others.

Current workplace

Norm Zhou's current company

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Deductive AI
Deductive Ai
Realtime AI Reasoning
AeroLeads page
13 roles · 26 years

Norm Zhou work experience

A career timeline built from the work history available for this profile.

Founding Engineer

Current

Mountain View, California, Us

Sep 2023 - Present

Senior Engineering Manager

Menlo Park, Ca, Us

Lead multiple 0->1 products in AI Platforms at meta, growing them into successful platforms with over 100 internal customer teams. Resulting in multiple product launches with over $100M win for Meta and large improvements in company topline metrics like monthly active users.

Nov 2017 - Nov 2023

Software Engineer

Oct 2016 - Oct 2017

Senior Software Engineer

Sunnyvale, Ca, Us

Mar 2015 - Oct 2016

Senior Staff Achitecture Engineer

Santa Clara, Ca, Us

• Architecture evaluation - Performance/Area/Power evaluation for algorithm implementations - Trade of analysis of new design features - Construct corner-case congestion stress tests for interconnect• Architecture Modeling - Maintain/Updating consistent arch model to software and hardware team - Creating new representation to adjust for silicon characterization results - Optimize performance of model generation software - Coordinate arch releases without interrupting development in software team• System specification - Combing hardware design specification/constraint from entire chip to form single coherent system level boot specification - Created new packed format and assembler/disassembler tool - Work with software team to implement specifications• Software - Algorithm specification for -- Power Estimation -- Power Optimization -- Configuration Generation - Managed timely completion of software implementation with remote and on-site software developers• Verification - Chip level - Small custom layout blocks

Aug 2011 - Mar 2015

Software Engineer (Architecture Modeling)

Santa Clara, Ca, Us

• Architecture modeling - Image processing Pipeline - Video output pipeline - Mpeg Mode Decision• Firmware - Reference microcode development• Verification - Fullchip - Large SoC Blocks (ARM/AMBA/IO, Entire Image processing pipeline) - Small functional Block testing (image filters, controllers...)• Tool Flow Optimization - Increase testing efficiency - Reduce Server Farm load from large regressions reruns - Integrate coverage analysis with regression runs

Mar 2007 - Aug 2011

Director Of Special Programs

Santa Clara, Ca, Us

• Lead the planning and execution of all aspects of annual conferences with thousands of attendees• Managing a team of ~50 volunteers• Make spending decisions• Work with HYSTA board members and other directors on - design of conference program - secure high profile speakers - secure sponsors

Mar 2008 - Dec 2009

Researcher

Berkeley, Ca, Us

Computer Science department, UC BerkeleyInteractive FPGA design environment. Intended Ph.D. dissertation (on Hold)• Research previous approaches to solving CAD tool turnaround time.• Design, Implementation, and evaluation of novel CAD algorithms in an interactive design environment.• Tie together different software pieces to form a complete tool-flow

Sep 2004 - Dec 2006

Teaching Assistant

Berkeley, Ca, Us

Computer Science department, UC Berkeley7 semesters in various Computer Science and Electrical Engineering classes. Beginning as an undergrad sophomore.• Classes include: EECS150, CS61C, EECS40 • Assisted and instructed undergraduate students in classroom and laboratory settings• Generated materials for labs, lectures, and exams• Gave complete lab and regular lectures• Taking new projects from concept to implementation as a head TA• Helped to revise course curriculum to better prepare students for the job market

Jan 1999 - May 2003

Engineer

Berkeley, Ca, Us

Computer Science department, UC BerkeleyCalinx instructional board design.• Collaborated with Xilinx during specification phase of ver1, 2 of Calinx Instructional Board • Debugged board design of Calinx ver1• Firmware development and debugging for peripherals• Developed materials for class projects using the Calinx board

May 2001 - Aug 2002

Research Engineer

Bwrc, Infineon

Berkeley Wireless Research CenterCollaborative Software Defined Radio project with Infineon• Cooperative work with visiting scholar and research team from Infineon.• Detailed architectural implementation of SIMD processor core cluster.• Designed and implemented different verification approaches.• FPGA based emulation using BEE (Berkeley Emulation Engine)

Aug 2002 - Aug 2004

Intern

Geneva, Switzerland, Ch

S.T. Microelectronics, Berkeley R&D lab (summer internship)SoC test chip design• Tensilica Xtensa processor emulation on FPGA• Design custom ASIC peripheral block• Integration and testing of processor and peripherals for SoC design

May 2000 - Aug 2000
2 education records

Norm Zhou education

Master Of Science - Ms, Computer Architecture

University Of California, Berkeley

Bs, Electrical Engineering & Computer Science

University Of California, Berkeley
FAQ

Frequently asked questions about Norm Zhou

Quick answers generated from the profile data available on this page.

What company does Norm Zhou work for?

Norm Zhou works for Deductive AI.

What is Norm Zhou's role at Deductive AI?

Norm Zhou is listed as Realtime AI Reasoning at Deductive AI.

What is Norm Zhou's email address?

AeroLeads has found 1 work email signal at @fb.com for Norm Zhou at Deductive AI.

What is Norm Zhou's phone number?

AeroLeads has found 1 phone signal(s) with area code 650 for Norm Zhou at Deductive AI.

Where is Norm Zhou based?

Norm Zhou is based in Fremont, California, United States while working with Deductive AI.

What companies has Norm Zhou worked for?

Norm Zhou has worked for Deductive Ai, Meta, Facebook, Linkedin, and Tabula.

How can I contact Norm Zhou?

You can use AeroLeads to view verified contact signals for Norm Zhou at Deductive AI, including work email, phone, and LinkedIn data when available.

What schools did Norm Zhou attend?

Norm Zhou holds Master Of Science - Ms, Computer Architecture from University Of California, Berkeley.

What skills is Norm Zhou known for?

Norm Zhou is listed with skills including Algorithms, Debugging, Fpga, Asic, Soc, C++, Architecture, and System Architecture.

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