Love to use Matlab, Python and FPGA with verilog for algorithm and logic synthesis.Guide less-noisy PCB fabrication with EMI/EMC rules.Design Sketchup 3D model for preemptive mechanical stuff considering, thermal and mechnical stability.
Wave Electronics Co., Ltd.
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Research FellowWave Electronics Co., Ltd.Gyeonggi-Do, South Korea
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Engineering Fellow Of Mixed Signal DesignNew Power Plasma Co.,Ltd Jun 2023 - Dec 2024Directing the build-up of the FPGA system for RF signal processing.
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Principal ArchitectTop Engineering Co Ltd Jun 2017 - May 2023Seongnam, Gyeonggi, South KoreaBuild up the full stack from HW up to FW such as FPGA based DAQ system supporting LAN TCP protocol, written in C# using VS code.Love to use Notion to share and/or record any work activities.Maintain all source codes in Git repository including circuit schematics, PCB artwork, FPGA setup code, and soft-CPU FW.Design parametric measurement unit for electronic device mass-production investigation.Implement FPGA interface logic with FIFO memory for ADC and DAC data transitions.Deploy SPI protocols for multiple subboards over backplane, to replace the lagacy parellel data bus.Evaluate analog op-amp circuit with SPICE model.Use 3D models to locate connectors on PCB and to machine Heat-spreaders and housing cases. -
Principal EngineerSamsung Electro-Mechanics Oct 2006 - May 2017Gyeonggi, South KoreaDebug FPGA HW/FW.Guide PCB artwork under EMI design rule.Program verilog, matlab, and/or c.Implement interface boards for instrumental devices via standard IO such as MIPI, SPI, IIC, and LAN.Study and design timing sync controller for pulsed laser and Acousto-optic modulator.
Frequently Asked Questions about Sung Eun Jo
What company does Sung Eun Jo work for?
Sung Eun Jo works for Wave Electronics Co., Ltd.
What is Sung Eun Jo's role at the current company?
Sung Eun Jo's current role is Research Fellow.
What schools did Sung Eun Jo attend?
Sung Eun Jo attended Postech.
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Sung-eun Jo
South Korea
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