-Currently working as an Automation Engineer at Dixon Technologies-Responsible for the FATP line process in smartphone manufacturing, covering the entire process from initial assembly to final packaging.-Gained expertise in various machines, including dispenser machines, battery assembly and rolling machines, auto screwing machines, BTB pressing machines, BC machines, visor machines, cable folding fixtures, and packout machines.-Acquired additional knowledge about CG machines and the operation of robotic arms in CG1, CG2, and CG3 processes.-Developed a comprehensive understanding of the smartphone manufacturing process and related automation systems.

- Led membership enhancement programs and events, driving new initiatives for growth.- Introduced the Women in Engineering Chapter at the university, fostering inclusivity.- Organized key technical workshops and sessions on Microwave, PCB designing, CST software, Verilog, and the DICCT Conference (held two times).

- Strengthened networking and organizing skills through event coordination and management.- Demonstrated leadership in managing volunteers and promoting teamwork for events.- Stayed updated with the latest technologies and research trends by being actively involved in these clubs.

- Progressed from NSS volunteer to Coordinator, showcasing dedication and leadership.- Actively contributed to initiatives benefiting the community, country, and the environment.- Organized impactful activities such as cleanliness drives, blood donation camps, plantation drives, and fundraising events.

- Conducted awareness campaigns in Dehradun, Rishikesh, Roorkee, and Haridwar to address critical issues like global warming.- Developed a strong sense of responsibility as a citizen through community service and awareness programs.

-Designed a verification test bench for 1K, 1Kx16, and 1Kx22 8T Dual Node SRAM memories on the SBC 65nm technology node at ISRO.-Configured the setup for the FastSPICE simulator using Synopsys CustomSIM PrimeSIM XA tool.-Generated, Extracted netlists and parasatics for Static and Dynamic Time Analysis using the Cadence Spectre simulator and Calibre to ensure accurate memory testing.-Contributed to the development of a precision decoder for a beam-throwing antenna.Utilized Cadence Virtuoso for schematic design in Schematic L and layout design in Layout XL.