Parker Mitchell Email & Phone Number

Redmond, Washington, Us

- Develop new hardware accelerators for "long tail" opportunities across Azure- Hardware/Software co-design, system-level optimization- Physical design & timing closure for AMD/Xilinx and Intel/Altera FPGAs- Tooling for hardware development

Redmond, Washington, Us

FPGA Acceleration in AzureArchitecture & system design, internal tooling for hardware design, physical design optimization & timing closure

Oak Ridge, Tn, Us

Beyond Moore Group, Advanced Computing Systems (2020-2021)Computational Data Analytics Group (2019-2020)I led the design of Caspian which is a neuromorphic development platform offering a C++/Python API, high-performance simulation engine, and FGPA-based accelerators written in SystemVerilog.

Oak Ridge, Tn, Us

Nature Inspired Machine Learning, Computational Data Analytics Joint Institute for Computational Sciences, The University of Tennessee, KnoxvilleResearching and developing Neuromorphic architectures, applications, and training algorithms with an emphasis on identifying and building neuromorphic-driven solutions for sensor-based applications and autonomous vehicles.

Knoxville, Tn, Us

TENNLab Neuromorphic Research Group (http://neuromorphic.eecs.utk.edu/)Advisor: Dr. Mark DeanMy M.S. thesis introduces a new digital neuromorphic architecture DANNA2. This project supersedes the original DANNA system and offers 10 times faster performance, 60% better effective capacity (for the same logic area), and increased flexibility and extensibility. Development required architecture design, RTL implementation (VHDL), behavioral verification, application of machine learning techniques, and creation of an optimized event-driven simulator (C++).

Knoxville, Tn, Us

TENNLab Neuromorphic Research Group (http://neuromorphic.eecs.utk.edu/)Advisor: Dr. Mark DeanWorked to improve the DANNA neuromorphic architecture and create novel deployments of neuromorphic systems.- Built an autonomous neuromorphic robot (NeoN) which serves as the first physical control system operated by DANNA - Optimized FPGA implementation of DANNA for Xilinx Virtex 7 2000T and Kintex 7 325T - Refined design and build process to achieve timing closure at double the prior frequency - Introduced compressed packet format for selected commands to improve host communication performance often resulting in 100 times less required bandwidth - Designed an AXI compatible DANNA IP block with automatic clock gating to reduce power and ensure synchronized operation - Implemented an automated build system for continuous integration of FPGA projects to ensure consistent build quality and increase group productivity

Maintenance and monitoring of mission-critical systems

Oak Ridge, Tn, Us

Group: Computational Data AnalyticsMentor: Dr. Catherine Schuman"Heterogeneous Computers for Neuromorphic Computing and Deep Learning"- Ported the DANNA Neuromorphic Architecture to a Xilinx Ultrascale Plus FPGA- Developed architecture concept and methodology for a pipelined, fixed structure CNN accelerator for real-time inference (on FPGA)- Benchmarked and compared CPU, GPU, and FPGA architectures for machine learning inference tasks using throughput, latency, and power as the key metrics

Olathe, Ks, Us

Aviation Safety & Data-link Group - Transponders Team- Worked on product development team for the new GTX 335/345 transponders- Developed new white box testing for 150 low level requirements- Overhauled testing which covered 326 low level requirements- Authored or updated requirements for multiple source files- Testing performed in accordance with DO-178b Level B standards- Updated testing process documentation on team wiki

Master Of Science - Ms, Computer Engineering

Bachelor Of Science - Bs, Computer Engineering

High School