-Converted compiler for ISR x86 dataplane platforms (4200/4300, 8200/8300, CSR) from Intel C Compiler (ICC) to Clang- Addressed compiler errors/issues that impacted builds for affected platforms- Converted data plane and control plane to be built little endian to support compiler conversion- Assisted in extending 64-bit data plane support to software emulated posix platforms (x86/ARM)- Corrected improper use of elements/structures with generic memory read/write API’s- Evaluated and addressed alignment issues that arose when platforms were built with 64-bit data plane- Added microcode sanity simulation support for i686 little-endian, x86 64-bit, event- Introduced Address Space Layout Randomization (ASLR) data plane support for ARM 64-bit platforms- Extended tool support for evaluating 64-bit ARM performance (FIA/STEM profiler, instruction tracing)- Evaluated and addressed bottlenecks with upcoming 64-bit ARM platforms- Aided in converting client feature components to follow binOS build standards-Triaged incoming bugs via Cisco Defect and Enhancement Tracking System (CDETS)

-Drove Acceptance Testing for Media Accelerator Reference Software ( M.A.R.S.) with 70+ tests across 5 different devices/systems-Dispositioned bugs to priorities of low, medium, high, and critical in order to reevaluate the goal of getting M.A.R.S. to beta-Fixed 3 bugs while optimizing code and improving user experience of software-Created profile configurations that showcased the difference in performance across Intel chipsets

- Developed DQVTool software in C# to automate process for comparing flight test data- Jumpstarted database to streamline model design using a repository of recommended equipment- Designed a graphical user interface (GUI) frontend for future database implementation

- Managed project to convert conference room to teleconference room (Budget -75,000)- Managed project to install Infrared Cameras on Unit 1 and Unit 2 Boilers (Budget-$675,000)- Conducted daily pre-job briefs with contractors before work was done- Developed work plan/schedule for project activities

-Produced Test Equipment Error Analysis Results (TEEAR) for Instrumentation Short-BasedAcceptance Checkout Equipment (ISACE)-Constructed one-lines for ISACE signal paths

- Adjusted archival process of ovation historian- Updated control system HMI for Simple Cycle Units and Steam Turbine 5- Participated in KT Problem Solving and Decision Making Training- Inspected heat trace enclosures for inefficiencies

Heterogeneous modeling and design of a space system

-Update specification sheets-Modify generator set schematics-Design HMI for use with radiators