I am a designer of analog/mixed signal integrated circuits with 8+ years of experience. I have worked on high-frequency phase-locked loops as well as various topics in SERDES design (clock distribution, clock-and-data recovery, transmitter, receiver front-end). I have performed more than 5 tapeouts in a nano-scale SOI technology node. Furthermore I have worked on technology-independent integrated layout automation and pcell development. Additionally, I developed my own custom simulators for efficient modeling and simulations of analog/mixed-signal circuits and systems.