Paul Colombo

Paul Colombo Email and Phone Number

Principal Software Engineer @ Honeywell Aerospace
Paul Colombo's Location
Chandler, Arizona, United States, United States
Paul Colombo's Contact Details

Paul Colombo personal email

n/a
About Paul Colombo

Write tests, debug, and integrate avionics for commercial airplanes.Specialties: Hardware Built in TestReal Time Embedded CPCI ASCBDO-178BDO-254Requirement development and tracingArinc communication.Test automation.X-Scale based systems.

Paul Colombo's Current Company Details
Honeywell Aerospace

Honeywell Aerospace

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Principal Software Engineer
Website:
rittal.com
Company email:
info@sps.honeywell.com
Paul Colombo Work Experience Details
  • Honeywell Aerospace
    Principal Software Engineer
    Honeywell Aerospace Oct 2011 - Present
    Charlotte, North Carolina, Us
    Design, develop, and integrate the following Real Time Embedded Built in Tests for Honeywell Primus Epic® integrated avionics system using C:Network Interface CardsPCI ASCB (Manchester & 8b10b)FPGA / ASICARINC 429, 717Heart Beat MonitorInternal and External DiscreteVersatile InputsRS232 RS422Flight Data RecorderVersatile InputsException HandlersInterrupt HandlersMemory (Flash, SDRAM, DPRAM)Timers
  • Honeywell Aerospace
    Sr. Systems Engineer
    Honeywell Aerospace Mar 2011 - Oct 2011
    Charlotte, North Carolina, Us
    Develop a Written Evidence Report (WER) to verify both the (Outflow-Valve Control Unit) OCU and (Semi Automatic Control Unit) SACU meet the requirement of: Smoke, flammability, and toxicity; Fungus resistance; and Constant acceleration.Develop a Ground Voltage Fluctuation test platform to test the OCU and SACU with multiple ground planes.Develop the software (Python scripts) and test tools to test normal activity while fluctuating the different ground planes between the Units Under Test (UUT).
  • Honeywell Aerospace
    Sr Sw Test Engineer
    Honeywell Aerospace Jun 2010 - Mar 2011
    Charlotte, North Carolina, Us
    The contract involved developing, integrating and certification of software (Level A DO-178B), for the Boeing B787 Flight Control Systems (FCS).Development environment utilized GreenHills and Rational Test Real Time (RTRT) environment for Power PC (PPC) and MIP’s processors.Development also included utilizing Matlab 7 for creating and modifying (HAM) Models and Stateflow for the Flight Control Systems.
  • Honeywell Aerospace
    Sr. System Integration Engineer
    Honeywell Aerospace Jan 2010 - May 2010
    Charlotte, North Carolina, Us
    Develop System Verification Test Procedures for 770 TSO MOPS activities using Honeywell ATE integrated System Bench. Automated and manual system test used the TIU PC to stimulate and record system data.Helped orchestrate System Verification through traceability to engineering product groups on the KSN 770 program including Displays/FMS, MMDS Radio, and GNSS GPS.All work managed using Serena Dimensions using PARs and CRs. Defects found while test development of the software and system tests were addressed through the JIRA web tool.
  • Breeze-Eastern
    Sw Test Engineer
    Breeze-Eastern Aug 2009 - Dec 2009
    Whippany, Nj, Us
    Wrote the test cases to verify the functionality of the SRDs for BL-35000 Control DSP Boot, DSP Motor Control, Control DSP Application, and the CP-35000 Pendant (boot and application). All requirements were traced and tracked through DOORS.Update the following planning documents to meet the current status of the program: Plan for Software Aspects of Certification (PSAC), Software Verification and Validation Plan (SVVP), Software Development Plan (SDP), and the Software Configuration Management Plan (SCMP).Reviewed all Software Requirements Documents against the SRR checklist for functional correctness and compliancy with DO-178B.Worked with the System Engineer to complete the System Functional Specifications Document. Designed the high and mid level block diagrams from the latest system schematics.
  • Honeywell
    Hw Test Engineer
    Honeywell Jun 2009 - Jul 2009
    Charlotte, North Carolina, Us
    Develop test plans and procedures to verify to standards a Digital Discrete Adapter (DDA) which receives ARINC data and sets discrete appropriately.All tests must meet DO-254 level C standards.Because the DDA was classified as a "Complex" part, tests needed to verify all functions and gate paths of the DDA.Design a hardware test platform that would be able to exercise the DDA and run all the test procedure.Debug and reverse engineer any issues that the above tests discover.
  • Crossbow
    Sw Test Engineer
    Crossbow Apr 2009 - May 2009
    Develop Rational Test Real Time (RTRT) code to test the Honeywell's Data Management Unit (DMU) and Honeywell's Flight Management System (FMS) software (real time embedded C++).Function tests were written and integrated to exercise the software and ensure it meets DO-178B level B certification.Structural tests were written and integrated to verify all lines of software are executed for DO-178B level B certification.Reviewed the Software Requirements Data (SRD) and Software Design Document (SDD) for functional correctness and compliance with DO-178B level B standards.
  • Honeywell
    Sr. Hw Test Engineer
    Honeywell Oct 2006 - Dec 2008
    Charlotte, North Carolina, Us
    Develop ATLAS code on the ATEC ATE to drive stimulus and record measurements to the DU, CDU, and MCDU units under test (UUT).Communicate to the UUT using ARINC 429 commands to initialize test parameters.Test need to be robust enough to run on a Environmental Stress Screening platform which tests over temperature, vibration, and EMI.Monitor ARINC 429 labels to verify specific states and outputs of the UUT.JTAG scan load the flash device of the UUT.Design, integrate, and test DU, CDU, and MCDU ATE harness cables to support JTAG loading of the UUT.Modify existing LabVIEW code to insure complete test coverage of next generation MCDU on the Vector ATP. Verify all groups test hardware prints are in compliance with the actual hardware. Lead team of 8 contractors coordinating their work and removing any roadblocks.Formally release all team member's updated print.Verify all requirements are tracked in DOORS.Verify DU embedded flight software is compliant with DO-178B standards.Fault inject embedded code to unit test each sub-system.Reverse engineer existing DU test code to create a SRD and Test Requirements Document (TRD). This was done because there was no formal Hardware Requirement Documents (HRD).
  • Intel Chg
    System Engineer
    Intel Chg Mar 2003 - Oct 2006
    Rebuilt the CV• Rebuilt the CV (compatibility validation) team from the ground up, including the test plan, test procedures, execution, debug and building a team of engineers.Manage a team of 4 engineers including performance reviews and raises.Configure budgets and headcount for forward planning.Develop new CV tests to ensure all requirements from the PRD are met.Automate many CV tests to reduce validation cycle time.Port the automated CV tests to production line screen for a percentage of parts.Design peripheral set tests (USB, IrDA, and RS232) along with NLOS tests (802.11, Bluetooth, GPS, and Cellular traffic.)Work with the CRB (customer reference board) design team to help develop the CRB and insure all customer and testability needs are integrated into this board.Work directly with customers to help them design their board support package (BSP) and integrate their peripheral set (Bluetooth, 802.11, USB, etc.) to the Intel X-Scale processor (PXA-270/Monahans). Review schematics, make recommendations on board design, and help debug this platform.Verify systems meet GSM, GPRS, and CDMA specifications.Work directly with the customers to understand and use their requirements to develop testable requirements. Coordinate all of the Intel internal validation teams to ensure the customer requirements are validated and meet customer needs. Work with Application Engineers to help create the DM (Developers Manual) from the IAS (Internal Architecture Specification.), which eventually ends up in the customers’ hands.
  • Intel Ead
    Test Engineer
    Intel Ead Jul 2001 - Feb 2003
    Design peripheral set tests (USB, IrDA, and RS232) along with NLOS tests (802.11, Bluetooth, GPS, and Cellular traffic.)Work with the CRB (customer reference board) design team to help develop the CRB and insure all customer and testability needs are integrated into this board.Work directly with customers to help them design their board support package (BSP) and integrate their peripheral set (Bluetooth, 802.11, USB, etc.) to the Intel X-Scale processor (PXA-270/Monahans). Review schematics, make recommendations on board design, and help debug this platform.Verify systems meet GSM, GPRS, and CDMA specifications.Work directly with the customers to understand and use their requirements to develop testable requirements. Coordinate all of the Intel internal validation teams to ensure the customer requirements are validated and meet customer needs. Work with Application Engineers to help create the DM (Developers Manual) from the IAS (Internal Architecture Specification.), which eventually ends up in the customers' hands.; Build an ATP from the ground up by automating the following tests using Segue SilkTest, Visual Basic, and LabVIEW:-Clarity PSQM -Echo Cancellation -Jitterbuffer-End to End Delay -Call Density -RFC 2833Coordinated random tests into a single test-plan, which mapped back to the product requirements.Designed a recurring test HW and SW (ATP) platform, which automatically tests the software build and sends the results out on a nightly basis.Designed and automated a results document, which incorporated all tests and automatically reports daily results through e-mail.Designed C++ code, which tests modifying and auditing the entire API.
  • Intel Bluetooth
    Software Engineer
    Intel Bluetooth Mar 2000 - Jul 2001
    Automate tests by using Segue SilkTest, C++, and Visual Basic to run automatically.Developed validation/test plans based on the Intel's Bluetooth Product Requirement Document.Represent Intel at the annual Bluetooth UnPlugFest which tests Bluetooth interoperability with current Bluetooth enabled companies.Execute the Bluetooth software stack validation/test plans on Windows 98, Windows ME and Windows 2000 to ensure both functionality and robustness. Developed Bluetooth stress and regression tests using Segue SilkTest to check for a robust software package without memory leaks.Generate problem (bugs) reports, work with the developers to isolate bugs, and validate bug fixes.
  • Honeywell
    Test Engineer
    Honeywell Jun 1997 - Mar 2000
    Charlotte, North Carolina, Us
    BCASDesigned, Developed, and Integrated Real Time Embedded C test software for Honeywell Flight Management Systems (FMS).Utilize above software to reveal any defects in the hardware design.Wrote the following Documents; the Test Requirements Document (TRD), the Software Requirements Document (SRD), and updated the error logs to provide traceability through all documents to the Hardware Requirements Document (HRD). Review the HRD, schematics, and consult with hardware product engineers to ensure all HW requirements are met.Design the embedded software to interact with external test stimulus using Labview.ATSIntegrate and debug Real Time Embedded C test routines for dual 29K processor based commercial Display Electronic Unit computer (LRU) in dual lock step mode.Transfer an 8 hour VIA test from the STS 2000 to a PC based pretest which ran 75% of the tests in an about an hour.Develop a hardware and software platform that would run single card testing of the Display Electronic Unit through ESS.Modified STS 2000 Atlas code to work with single card testing.Develop formal manuals for production technicians to run tests.Develop hardware test fixture to support single card testing.Nominated for Lifetime Achievement Award for this project.Designed, developed and integrated Visual C++ LabWindows code to communicate information to and from the embedded unit under test to the Windows platform.Fault injected existing test software to guarantee test coverage and compatibility.Prepare and release formal instructional documentation of test software for production and service centers.Maintain and enhance legacy Real Time Embedded C test software for Boeing 777 Display Electronic Unit.

Paul Colombo Skills

Do 178b Test Automation Do 254 Avionics Arinc 429 Debugging Systems Engineering Clearcase Embedded Systems Embedded Software Testing Labview System Testing Hardware Architecture C Electronics Software Design Digital Signal Processors C++ Integration Software Development

Paul Colombo Education Details

  • University Of Utah
    University Of Utah
    Electrical Engineering
  • College Of Eastern Utah
    College Of Eastern Utah
    Science Electronics

Frequently Asked Questions about Paul Colombo

What company does Paul Colombo work for?

Paul Colombo works for Honeywell Aerospace

What is Paul Colombo's role at the current company?

Paul Colombo's current role is Principal Software Engineer.

What is Paul Colombo's email address?

Paul Colombo's email address is pc****@****cox.net

What schools did Paul Colombo attend?

Paul Colombo attended University Of Utah, College Of Eastern Utah.

What skills is Paul Colombo known for?

Paul Colombo has skills like Do 178b, Test Automation, Do 254, Avionics, Arinc 429, Debugging, Systems Engineering, Clearcase, Embedded Systems, Embedded Software, Testing, Labview.

Who are Paul Colombo's colleagues?

Paul Colombo's colleagues are Ryan Schaeffer, James Breglia, Kimberly Young, Nolan Petersen, Heinz Schmitt, Stephen Meli, Hongying Zhong.

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