Responsible for driving Acorn Technologies' semiconductor IP development programs including advanced metal-semiconductor contacts targeting future CMOS nodes, strained FDSOI for future RF/mmWave applications, and Silicon Photonic Interposers for heterogeneous integration of chiplets. Development of business plans, internal technology roadmaps, project planning, recruitment of R&D personnel. Continued deep involvement in R&D projects at engineering level (inventions, transistor process & device simulation in TCAD (Synopsys, Silvaco), photonic device simulation (Lumerical FDTD), test device design, electrical measurements, DOE, process integration, advanced materials analysis, physics theory, data analysis). Leading collaborations with development partners (academic and industry). Current projects include metal-semiconductor contact resistance solutions applicable to finFETs and nanowire FETs, novel strain methods for FDSOI and strained germanium laser for silicon-based photonics.Patent preparation, prosecution and litigation; responding to OAs, support of infringement litigation & IPR defense. Reverse engineering, IP infringement detection methodologies (primarily TEM/EDX). Presentation of Acorn's technologies to investors and customers.More than 50 issued US patents in semiconductor device technology.

Individual contributor and lead engineer in a team of TCAD, process integration and device engineers consulting on advanced CMOS (to 45nm) and SiGe HBT (BiCMOS) technologies with various major IC manufacturers (IDMs and foundries). Invented superior SiGe HBT technology while consulting to leading Japanese client.Layout analysis and advanced critical area extraction: Yield prediction based on CA extractions including resolution of measured yield into random and systematic components. Developed yield modeling and prediction methodologies based on design attributes. Supported yield ramp teams on customer projects. Root cause analysis of SRAM failure bit maps based on micro-event critical area analysis. Advised software developers on new modeling and analysis tools which became key components of PDF’s yield ramp infrastructure.

Developed advanced semiconductor process and device simulation solutions for leading IC manufacturers. Worked closely with process and device development teams as the dedicated TCAD training and support engineer at Motorola APRDL, Austin, TX (now Freescale). Authored chapters of TCAD manuals including dessis (now sentaurus device).