Lead Physical Design
Current
Apr 2023 - Present
AeroLeads people directory · profile
Pavan Vora Email & Phone Number
Lead Physical Design Engineer at ProteanTecs || Ex-Intel || Ex-eInfochips
at
proteanTecs
1 work email found
@einfochips.com
LinkedIn matched
✓ Verified July 2026
4 data sources
Profile completeness 100%
Current company
Role
Lead Physical Design Engineer at ProteanTecs || Ex-Intel || Ex-eInfochips
Location
Ahmedabad, Gujarat, India
Company size
Who is Pavan Vora? Overview
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Quick answer
Pavan Vora is listed as Lead Physical Design Engineer at ProteanTecs || Ex-Intel || Ex-eInfochips at proteanTecs, a with 74 employees, based in Ahmedabad, Gujarat, India. AeroLeads shows a work email signal at einfochips.com and a matched LinkedIn profile for Pavan Vora.
Pavan Vora previously worked as Lead Physical Design at Proteantecs and SoC Design Engineer at Intel Corporation. Pavan Vora holds Master Of Engineering - Meng, Vlsi System Design - Asic from Marwadi Engineering College, Gtu.
Company email context
Email format at proteanTecs
This section adds company-level context without repeating Pavan Vora's masked contact details.
{first}.{last}@einfochips.com
86% confidence
AeroLeads found 1 current-domain work email signal for Pavan Vora. Compare company email patterns before reaching out.
Profile bio
About Pavan Vora
"Devotee of Semiconductor"
Listed skills include Verilog, Matlab, Fpga, Vlsi, and 27 others.
Current workplace
Pavan Vora's current company
Company context helps verify the profile and gives searchers a useful next step.
Proteantecs
7 roles
Pavan Vora work experience
A career timeline built from the work history available for this profile.
Soc Design Engineer
Jan 2021 - Apr 2023
Senior Physical Design Engineer (Level 2)
Jul 2020 - Jan 2021
Oct 2018 - Jan 2021
Asic- Physical Design Engineer
Working on 16nm FF+ technology. Handling multiple blocks for complete PNR to GDS flow. Experience of 3 projects of 16nm.Floor Planning, Power Planning, Placement, Clock Tree Synthesis, Routing, Static Timing Analysis, Physical Verification: LVS, DRC, Antenna check, Signal EM checkHands-on tools like Cadence Innovus, Synopsys Prime Time, IC Validator, Formal LEC.Experience on on 28nm technology chip as well.
Jun 2015 - Jan 2021
Asic-Physical Design Trainee Engineer
Training and Projects on physical design.Performed project of 40nm technology at eITRA training institute.Tool: ICC, Prime time, Scripting: TCL, Shell, PerlHDL: Verilog
Jan 2015 - Jun 2015
Teaching Assistant
Marwadi Education Foundation Group Of Institutions
Teaching assistant during Master of Engineering study.Conducting practical session in lab for subjects like Digital electronics, Basic electronics.
Sep 2013 - Dec 2014
Team & coworkers
Colleagues at proteanTecs
Other employees you can reach at proteantecs.com. View company contacts for 74 employees →
EZ
Endrawes Zaher
Colleague at ProteantecsIsrael
View →
BK
Bar Korkos
Colleague at ProteantecsKiryat Ata, Haifa District, Israel
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GK
Gil Kapel
Colleague at ProteantecsNorth District, Israel
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DL
Dong-Hyun Lee
Colleague at ProteantecsSeoul, South Korea, Korea, Republic Of
View →
MA
Mayank Agrawal
Colleague at ProteantecsAjmer, Rajasthan, India
View →
RP
Rajiv P.
Colleague at ProteantecsAustin, Texas Metropolitan Area, United States
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SR
Shashank Reddy
Colleague at ProteantecsBengaluru, Karnataka, India
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IW
Inbar Weintrob
Colleague at ProteantecsBinyamina, Haifa District, Israel
View →
OP
Olga Polyak
Colleague at ProteantecsHaifa District, Israel
View →
AB
Artem Bidnyarskiy
Colleague at ProteantecsUkraine
View →
Endrawes Zaher
Colleague at ProteantecsIsrael
View →
BK
Bar Korkos
Colleague at ProteantecsKiryat Ata, Haifa District, Israel
View →
GK
Gil Kapel
Colleague at ProteantecsNorth District, Israel
View →
DL
Dong-Hyun Lee
Colleague at ProteantecsSeoul, South Korea, Korea, Republic Of
View →
MA
Mayank Agrawal
Colleague at ProteantecsAjmer, Rajasthan, India
View →
RP
Rajiv P.
Colleague at ProteantecsAustin, Texas Metropolitan Area, United States
View →
SR
Shashank Reddy
Colleague at ProteantecsBengaluru, Karnataka, India
View →
IW
Inbar Weintrob
Colleague at ProteantecsBinyamina, Haifa District, Israel
View →
OP
Olga Polyak
Colleague at ProteantecsHaifa District, Israel
View →
AB
Artem Bidnyarskiy
Colleague at ProteantecsUkraine
View →
4 education records
Pavan Vora education
Master Of Engineering - Meng, Vlsi System Design - Asic
Marwadi Engineering College, Gtu
Bachelor'S Degree, Electronics And Communication Engineering
Gec, Rajkot
Diploma Engineering, Electronics And Communication Engineering
Education record
Murlidhar High School, Rajkot
FAQ
Frequently asked questions about Pavan Vora
Quick answers generated from the profile data available on this page.
What company does Pavan Vora work for?
Pavan Vora works for proteanTecs.
What is Pavan Vora's role at proteanTecs?
Pavan Vora is listed as Lead Physical Design Engineer at ProteanTecs || Ex-Intel || Ex-eInfochips at proteanTecs.
What is Pavan Vora's email address?
AeroLeads has found 1 work email signal at @einfochips.com for Pavan Vora at proteanTecs.
Where is Pavan Vora based?
Pavan Vora is based in Ahmedabad, Gujarat, India while working with proteanTecs.
What companies has Pavan Vora worked for?
Pavan Vora has worked for Proteantecs, Intel Corporation, Einfochips (An Arrow Company), Einfochips, and Eitra - Einfochips Training & Research Academy Ltd.
Who are Pavan Vora's colleagues at proteanTecs?
Pavan Vora's colleagues at proteanTecs include Endrawes Zaher, Bar Korkos, Gil Kapel, Dong-Hyun Lee, and Mayank Agrawal.
How can I contact Pavan Vora?
You can use AeroLeads to view verified contact signals for Pavan Vora at proteanTecs, including work email, phone, and LinkedIn data when available.
What schools did Pavan Vora attend?
Pavan Vora holds Master Of Engineering - Meng, Vlsi System Design - Asic from Marwadi Engineering College, Gtu.
What skills is Pavan Vora known for?
Pavan Vora is listed with skills including Verilog, Matlab, Fpga, Vlsi, Asic, Cmos, Semiconductor, and Perl.
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