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Ph.D. in Electrical Engineering. Specialized on Microelectronics and Microprocessor System Modelization, Simulation and Analysis.Personal Qualities:- Excellent capacity of analysis and synthesis- Creativity, innovation, exploration, organization Professional Experiences:- Direct experiences in multinational, distributed engineering projects. - Multilingual (English, French, German) with excellent communication skills. - Contribution to and follow-up on projects in all phases, starting from the initial product conception, detailed product definition with the marketing, hardware/software breakdown, module specification plus implementation as well as final product validation and customer support. Goals:Seeking contacts for technical exchange on product development responsibilities in the domain of embedded microprocessor systems, architecture and multiprocessor SoC. In addition to that, always interested in contacts allowing evolution in technical management functions.Specialties: Microprocessor Architecture, embedded Microprocessor Systems, System-on-a-Chip (SoC), Multiprocessor System Architecture, Hardware-Software Breakdown, Product Validation and functional Validation, Real-Time Software, System Modelization and Simulation
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Senior Digital Ic ArchitectScalinxParis, Fr
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Digital Ic ArchitectScalinx Oct 2020 - PresentParis, Île-De-France, FranceResponsible for the definition of the digital parts of mixed-signal IC's / SoC devices and/or blocks constituting itin relationship with customers, project managers, and designers.Participating in the debates on architectural choices for research versus product tradeoff and in the interest of continuous improvement of the design and design methods.
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Senior Ic Architect, Digital DesignIc'Alps Jan 2019 - Dec 2019Meylan, France & Paris Area, FranceResponsible for the specification of the IC / SoC devices and/or blocks constituting it(features, performance, verification methods by simulation and on silicon), in relationship with customers, project managers, and other designers.Vis-à-vis customers, being the technical guarantor of the performance of the circuit in accordance with the specifications.Vis-à-vis the team, participating in the debates on architectural choices for research compromise and in the interest of continuous improvement of the design methods. -
Product Development Manager And System ArchitectCxignited Dec 2016 - Mar 2018Paris Area, France / La Ciotat, FranceResponsible for the development and delivery of a RFID-based infrastructure for Real-Time Inventory and Localization (RTIL) Systems. - Lead actively the definition and implementation of the RTIL infrastructure (hardware and firmware) as well as the software platform serving it.- Participate in architecture definition and testing of the system software platform ShopCX. -
Product Development ManagerTagsys Rfid Nov 2014 - Dec 2016Paris Area & La Ciotat, FranceResponsible for the development and delivery of a RFID-based infrastructure for Real-Time Inventory (RTI) Systems. - Lead actively the definition and implementation of the RTI software platform as well as the infrastructure hardware and its interfaces to the standard software products.- Participate in architecture definition of the stardard software platform FiTS. -
Principal R&D EngineerElo Touch Solutions Oct 2012 - Jul 2014Paris Area, FranceEmbedded systems architecture (hardware and software) and design methodology for APR-based touch systems. Implementation of embedded solutions in APR and other touch technologies.Strong interaction between physics design team and platform implementation team. Performed all stages of embedded system development from conceptual design and architecture definition down to hardware and software implementation. -
Embedded Dsp ExpertTe Touch Solutions Sep 2010 - Sep 2012Paris Area, FranceDSP and microprocessor expertise for touch solutions using APR (Acoustic Pulse Recognition) system "ReverSys".Specification and implementation of dedicated APR front-end firmware on Audio-DSP device. Interaction with design team of back-end processor system (embedded Linux-based) and physical design team. -
Vlsi Development ManagerDxo Labs Jan 2007 - Nov 2010Paris Area, FranceLead and actively participate in development of new generation of microprocessors for embedded digital imaging.Micro-architecture design and RTL implementation of a dedicated image processor for embedded application. Full validation of the design based on manually written and synthesized firmware running on the designed processor. -
Hardware Technical LeaderMnd (Methodologies And Designs) - France May 2004 - Jan 2007Paris Area, France• Technical responsibility for VLSI/RTL design team.• Architecture definition, specification, implementation, verification and support of modules in MP-SoC (Multiprocessor System-on-a-Chip) devices.• Technical contact point for international customers.• Investigation into advanced design methodology for MP-SoC.
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Hardware Project LeaderOn-Chip Solutions (France) Jan 2003 - Dec 2003Paris Area, FrancePrivately founded start-up project, seeking venture capital... Technical leadership for VLSI/RTL design group "5 engineers" Working on reconfigurability aspects of the product, system architecture and future extensions Contribution to business plan and product definition
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Validation Technical Leader / Validation Team ManagerGlobespanvirata (Division In France) Apr 2000 - Jan 2003Paris Area, France2001-2002: Validation Technical Leader and Validation Team Manager Technical Leadership of telecom product validation group (9 engineers) Definition and implementation of automatic test environment (entire validation system, test boards, and software) Project planning and tracking of activities of the validation team (4 projects) Delivered entire sections of project documentation (Data Book etc.) Trained software teams locally (in France) and remotely (in the U.S.) on hardware and software aspects of the multiprocessor system2000: Conformance and System Test Senior Engineer: Product validation of HDLC processing software/firmware: Conception, specification, implementation, and execution of tests. Implemented and extended automatic test launch for non-regression tests Successful preparation of conformance tests for PDH framers Temporary assignment to the U.S.: Ramp-up software development team and establish product validation environment -
Application Group LeaderT.Sqware (France) Sep 1997 - Apr 2000Paris Area, France1998-1999: Application Group Leader: Lead a group of 3 engineers working on functional hardware validation Specification of test and evaluation boards; Technically responsible for subcontractors Customer support (software development on SPARClet processors): Technical contact point for US customers; Link between FAEs and the Application Lab in France Acted as Product Manager1997: Member of Architecture Simulation Group: Extension and maintenance of the SPARClet Architecture Simulator SASlet Ported application software to run on the simulator
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Research AssistantUniversität Der Bundeswehr Hamburg, Germany May 1992 - Aug 1997Hamburg, Germany Delivered to a European research project (SMILE, part of ESPRIT/OMI): 1) Clock-tick precise, timing accurate C-module of the SPARC-CPU for the architectural simulator 2) Specification and implementation of the performance analysis tool ASAP Doctoral Thesis - Research in performance evaluation of real-time computing systems and conceptual work on methods of describing and evaluating performance metrics
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Research AssistantTechnische Universität Braunschweig, Germany Jan 1991 - Apr 1992Braunschweig, Germany Development and improvement of a new design principle of fault tolerant integrated circuits with low overhead, called FBR (functional block redundancy).Co-holder of a patent.
Peter Nowottnick Skills
Peter Nowottnick Education Details
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Electrical Engineering, Computer Science -
Electrical Engineering, Microelectronics -
Grundschule Bürgerstraße, Braunschweig -
Grundschule Bürgerstraße, Braunschweig
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Hoffmann-Von-Fallersleben Gymnasium, Braunschweig
Frequently Asked Questions about Peter Nowottnick
What company does Peter Nowottnick work for?
Peter Nowottnick works for Scalinx
What is Peter Nowottnick's role at the current company?
Peter Nowottnick's current role is Senior Digital IC Architect.
What is Peter Nowottnick's email address?
Peter Nowottnick's email address is pe****@****ail.com
What is Peter Nowottnick's direct phone number?
Peter Nowottnick's direct phone number is +336307*****
What schools did Peter Nowottnick attend?
Peter Nowottnick attended Helmut Schmidt Universität - Universität Der Bundeswehr Hamburg, Technische Universität Braunschweig, Grundschule Bürgerstraße, Braunschweig, Grundschule Bürgerstraße, Braunschweig, Hoffmann-Von-Fallersleben Gymnasium, Braunschweig.
What skills is Peter Nowottnick known for?
Peter Nowottnick has skills like Embedded Systems, Embedded Software, Microprocessors, Soc, Digital Signal Processors, System Architecture, Processors, Hardware Architecture, Debugging, Multiprocessing, Firmware, Rtl Design.
Who are Peter Nowottnick's colleagues?
Peter Nowottnick's colleagues are Ludovic Jeanne, Christophe Savina, Luan Le, Bader Farsi, Hervé Marie, Alizé Laisney, Filipe Dos Santos.
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