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Principal Design Engineer Technically oriented team player with effective communication and time management skills that quickly analyzes technical problems and devises solutions that meet project goals. Expertise includes:• Power amplifiers (PAs), low noise amplifiers (LNAs) and WLAN front end modules (FEMs) using GaAs (HBT and HEMT) technologies. • Converter and mixer products using GaAs, SiGe, and diode technologies.• Integrated circuit (IC), laminate and multi-chip module (MCM) technologies.• Passive components: baluns, 90 degree hybrids, diplexers and power dividers.• Interfacing with external semiconductor foundries.Contact Information: petermares22@gmail.com
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Principal Design EngineerQorvo (Triquint Became Qorvo After The Merger Of Triquint And Rfmd) Jan 2015 - Oct 2015San Jose, Ca• Designed a high-efficiency multi-stage power amplifier for BTS small cell applications employing digital pre-distortion (DPD). • Worked on a high-linearity multi-stage power amplifier for BTS small cell applications. • Supervised, in addition to my primary role as circuit designer, the Design Engineering CAD group of 4 people and the Design Engineering Technician group of 7 people, allocating resources to various Design Engineering projects. -
Principal Design EngineerTriquint (Triquint Acquired Wj Communications ) 2008 - 2015San Jose, Ca• Worked on a fully integrated, internally matched 5GHz WLAN front end module (FEM) consisting of a LNA with a LNA Bypass Switch and a SPDT Transmit / Receive (T/R) Switch optimized for high throughput 802.11ac devices.• Expanded Error Vector Magnitude (EVM) measurement setup capability for 5GHz switch measurements, extending maximum power to >24dBm at which EVM noise floor is <1%, enabling significantly improved switch EVM measurements for 802.11ac applications.• Designed a family of wideband, high-performance LNA gain block products: TQP3M9005: NF=0.8dB, OIP3=34dBm and Gain=15.3dB at 1.9GHz. TQP3M9006: NF=1.0dB, OIP3=38.5dBm and Gain=13.5dB at 1.9GHz. TQP3M9007: NF=1.3dB, OIP3=41dBm and Gain=13dB at 1.9GHz.• Investigated performance tradeoffs of various output stage topologies, structures, and layouts for 2.4 GHz WLAN power amplifiers. • Led project and contributed a design to the development of high performance mixers with integrated LO amplifiers (ML483 / ML485). Designed the ML485 a wide band, low current, high IIP3 fully integrated MMIC converter. • Managed, in addition to my primary role as circuit designer, the Design Engineering CAD group of 4 people (4+ years) and the Design Engineering Technician group of up to 8 people (2+ years). Allocated CAD and technician resources to various Design Engineering projects. -
Senior Design EngineerWj Communications (Acquired By Triquint) 1995 - 2008San Francisco Bay Area• Designed MH series of high performance PCS (MH1), UMTS (MH101, MH102) and Cellular band (MH203, MH205, MH201) MMIC mixers featuring high IIP3 (>32 dBm), low conversion loss (7.5-8.5 dB), good isolation and requiring no external components. • Led design team that successfully transferred the MH line of MMIC mixers (MH1A, MH103A, MH201A, MH203A, and MH205A) to an outside foundry. Mixer designs not only met but in most cases exceeded target specifications. Reduced mask cost by implementing common die plans. • Designed I/Q Demodulator block for a RFID reader chipset in a SiGe BiCMOS process. Responsible for design tradeoffs, performance validation and setting I/Q Demodulator block specifications based on system level requirements and initial design simulations. • Designed Rx section of quad band, low power Rx/Tx MMIC in a SiGe BiCMOS process. The Rx section consumed <45mW and was designed to cover 4 frequency bands between 120 MHz and 950 MHz.• Spearheaded project that investigated feasibility of using an outside foundry to fabricate passive components in support of company’s MCM products. Designed 90 degree hybrids, diplexers, power dividers, inductors and various baluns for the Cellular and PCS/UMTS/ISM bands. • Worked on the design of the high performance and highly successful HMJ7-1 CATV mixer specifically optimized to meet the demanding spur requirements of the CATV industry. • Designed baluns of various topologies and transformation ratios. MMIC baluns as well as baluns using cores were developed.• Developed a R&D converter test station that can measure conversion loss, IIP3, IIP2 and isolations (L-R, L-I, R-I) from 5MHz to 8GHz.• Managed, in addition to my primary role as circuit designer, the Semiconductor Design Engineering Laboratory at the Milpitas facility. Supervised up to 3 technicians and 2 assemblers. Increased productivity by creating dedicated measurement setups and by initiating programs to automate those test stations.
Peter Mares Skills
Peter Mares Education Details
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Postdoctoral Fellow -
Doctor Of Philosophy (Ph.D.)
Frequently Asked Questions about Peter Mares
What is Peter Mares's role at the current company?
Peter Mares's current role is Principal Design Engineer.
What is Peter Mares's email address?
Peter Mares's email address is pe****@****rvo.com
What schools did Peter Mares attend?
Peter Mares attended University Of Illinois At Urbana-Champaign, University Of Illinois At Urbana-Champaign.
What skills is Peter Mares known for?
Peter Mares has skills like Semiconductors, Ic, Rf, Circuit Design, Rf Design, Testing, Microwave, Analog, Pcb Design, Semiconductor Industry, Wireless, Radio Frequency.
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Peter Mares
Baltimore, Md5pivotphysicaltherapy.com, constellation.com, gmail.com, gmail.com, apexphysicspartners.com4 +141047XXXXX
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Peter Mares
Managing Director | Leading A Revolution In Ai Driven Sales And Profit Growth.Greater Philadelphia5leclairryan.com, gmail.com, unisys.com, unisys.com, inventivhealth.com1 (804) 7XXXXXXX
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