Graduated from San Jose State University in May 2015, majoring in Computer Engineering.Experience in:• Combinational and sequential logic theory and circuits. Emphasis on mixed logic and algorithmic state machines.• Digital system building blocks, data path and control units, system-level RTL design, Verilog HDL for design and verification.• 32-bit pipelined MIPS processor.• ARM Cortex-M3 based microcontroller• Electronics design automation (EAD) tools – Xilinx ISE design tool suite.• Field programmable gate array (FPGA) devices – Digilent Nexys2 FPGA board.• Software testing processes.• Programming language C/C++• Cisco switches, routers, and firewalls• CCNA Routing and Switching• CCNP Routing and Switching