I have IT technology and integrated circuit design and integrated system skills, enterprise chip has more than 10 years of experience. Able to analyze the abnormal situation in the product development process in a timely manner and make suggestions and comments. Control project development progress and development cost. New product development, new process development, process improvement and optimization of module level verilogRTL implementation, responsible for module level verilogRTL implementation, writing verification platform and completing module level simulation and verification.
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Senior R And D EngineerAppleUnited States -
Senior R&D EngineerApple May 2018 - PresentCupertino, CaEveloped chip solution, responsible for module level verilogRTL implementation, wrote verification platform and completed module level simulation and verification. Responsible for part of the design. Development. Test and other related documents, and provide appropriate technical support.
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R&D EngineerApple Sep 2014 - Apr 2018Cupertino, CaResponsible for new product research and development, new process development, and handling related problems in the process of mass production, evaluation, development and introduction of new chip equipment and new materials. Improve and optimize the process process, improve the product yield, undertake various scientific research projects and organize the implementation.
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Design EngineerDell Technologies Nov 2010 - Aug 20145450 Great America Pkwy, Santa Clara, Ca 95054Participate in the planning and design of new semiconductor laser products, and the evaluation of product technical indicators. Research and formulate product process routes, timely analyze abnormalities in the product development process, and make suggestions and opinions. Control the project development progress and development cost, the handover of project production and the tracking and solution of problems after the conversion. -
Research AssistantDell Technologies Jun 2006 - Nov 20105450 Great America Pkwy, Santa Clara, Ca 95054Organize the implementation of analysis and evaluation of the feasibility of new product development, prepare the overall project plan and the solution of key processes and key technical problems
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Ndt TechnicianDell Technologies Oct 2004 - May 2006Santa Clara, CaResponsible for the ATE test coverage, testability, manufacturability, and engineering experiments of the chip to be tested. Undertake and complete the development of ATECHAR and HTOL engineering experimental procedures, and anomaly location analysis. RMA problem handling, hardware environment construction, iterative vector verification and upgrade. Test the supporting hardware tools anomaly location analysis or design
Phillip K. Education Details
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Applied Computer Science -
Computer Science
Frequently Asked Questions about Phillip K.
What company does Phillip K. work for?
Phillip K. works for Apple
What is Phillip K.'s role at the current company?
Phillip K.'s current role is Senior R and D Engineer.
What schools did Phillip K. attend?
Phillip K. attended University Of Cambridge, University Of Electronic Science And Technology Of China.
Who are Phillip K.'s colleagues?
Phillip K.'s colleagues are Anjali Ariathurai Pioso, Karim Jamal Rosa, Sonia Madin, Mubarak Dudekula, Savita Pandey, Zhiwu Guo, Md Junaid.
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1houstonisd.org
2 (713) 5XXXXXXX
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Phillip A. Matheson, AIF®,CRPC®,C(k)P®
Aliso Viejo, Ca1gocentennial.com
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