Pierre Muller Email and Phone Number
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EM Microelectronic is a leading RFID semiconductor provider, active in the field for over 35 years. Leveraging our history and building on our long-term stability as a wholly-owned subsidiary of the Swatch Group, we pride ourselves on being one of the leading innovators in the field, be it through our #dual-frequency em|echo or through our #AugmentedRFID strategy.Our goal is to build on our strong existing customer base and partnership network to define, develop and deploy our next-generation product roadmap. Responsibilities* Full Business Unit P&L * Drive world wide RFID business development * Product management : Product portfolio management, development roadmap, GTM * Technical development and product strategy for LF, UHF and dual-frequency RFID product lines* Management and leadership responsibility for a multi-site team across several continentsI started my professional journey as digital design engineer in mixed signal environment and develop to technical leadership , project management and team management. I enjoyed working for wireless industry for 12 years on many of the connectivity standard (Bluetooth , Wifi, GSM, 3G and LTE) , including a mind changing experience in STEricsson working daily with former Nokia, NXP, Ericsson and silicon lab teams in a very rich multi cultural environment. At the end of the StEricsson story, I joined TIEMPO-IC, a startup company founded to develop asynchronous technology EDA tool to take in charge HW development and industrialization of Secured Smart card products certified Common Criteria AL5+ for banking and eID application.
Em Microelectronic
View- Website:
- emmicroelectronic.com
- Employees:
- 424
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Rfid Business Unit LeaderEm MicroelectronicGrenoble, Rhone-Alpes, France -
Rfid Business Unit ManagerEm Microelectronic Apr 2021 - PresentMarin-Epagnier, Neuchâtel, SwitzerlandOwnership and accountability foro RFID Business Unit P&Lo Strategy and roadmap, technical marketing and product managemento Business development and go-to-market/NPIo Management responsibility for the RFID team globally, covering product management, engineering and field application support activities -
Rfid Bu Technical LeaderEm Microelectronic Sep 2017 - Apr 2021Marin-Epagnier, Canton De Neuchâtel, SuisseTechnical leadership for all RFID product lines (Low Frequency, UHF and dual-frequency HF/UHF ). This includes project definition, development ( design, layout, test) and productization ( qualification, product engineering) and direct people management responsibility. This includes development of 2 awards winning projects: - EM|echo-V : RFID Journal "Best product of the year" 2020 - EM|aura-sense : Frost & Sullivan "New product Innovation award" 2020. -
Iso/Iec Jtc 1/Sc 31/Wg 4 "Radio Communications" ExpertIso - International Organization For Standardization Jan 2018 - Present -
Vp Engineering Secure Products, Team Management, Product Qualification And Product IndustrializationTiempo-Ic Apr 2013 - Sep 2017Grenoble Area, FranceResponsible for Secure product HW development from specification to silicon manufacturing, testing and validation. This includes direct management of a muli-disciplinary team, managing partnership with IP providers, silicon foundry and leading product qualification with industrialization partner. Products are Common Criteria EAL5+ certified for security and banking application.
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Rf Digital Design Team ManagerSt-Ericsson Sep 2012 - Apr 2013GrenobleManaged a team of 30+ people over 4 sites. The team’s missions included : (1) Low power, Low interference digital architectures based on a 32-bit MCU integrated into RF transceivers ICs, (2) Digital design & implementation, (3) Digital verification, Mixed analog/digital verification and HW/SW verification. (4) Digital validation & industrial test supportLead of DigRF architecture group that defines and own RFIC/DBB interface roadmap for all STE level.
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Digital Design Team Manager For FranceSt-Ericsson Jan 2009 - Sep 2012Digital design team manager for France organization (10 direct reports + up to 10 functional reports.)Lead of digital subsystem architecture for advanced cellular RF Transceiver. Interference mitigation architecture definition and validationLead of design implementation based on IPXACT assembly.Lead of digital subsystem and ASIC top level verification.Lead of physical implementation (synthesis, DFT, backend), and FPGA and silicon validation.Definition and setup of advanced flow to managed ASIC programming information synchronization betweenASIC verification, silicon validation, and industrial test and Software Implementation activities.
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Digital Design Team LeaderSt-Ericsson 2008 - 2009Lead of architecture, design and implementation of digital DigRF V4 high speed serial interface IP in 65nm -
Digital DesignerStmicroelectronics 2000 - 2008Digital subsystem design and integration for WiMax RF transceiver in 65nm. Digital verification, synthesis, DFT insertion, formal verification. Drive of physical implementation. Digital architecture partitioning and interface definition between RF and modem subsystem for WIFI singlechip. Architecture definition for ASIC startup controller.Definition and implementation of RF subsystem digital part (specification to gate level netlist, verification) -Drive of physical implementation. Design and verification of modem digital filters with SOC team.Modeling of RF/analog IP DigRF V3 serial interface architecture and digital design (specification to GDS) in 65nm
Pierre Muller Skills
Pierre Muller Education Details
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Micro-Electronics
Frequently Asked Questions about Pierre Muller
What company does Pierre Muller work for?
Pierre Muller works for Em Microelectronic
What is Pierre Muller's role at the current company?
Pierre Muller's current role is RFID Business Unit Leader.
What is Pierre Muller's email address?
Pierre Muller's email address is pi****@****son.com
What schools did Pierre Muller attend?
Pierre Muller attended Grenoble Inp - Uga.
What skills is Pierre Muller known for?
Pierre Muller has skills like Asic, Integrated Circuit Design, Verilog, Mixed Signal, Vhdl, Rf, Team Management, Static Timing Analysis, Application Specific Integrated Circuits, Logic Synthesis, Simulations, Dft.
Who are Pierre Muller's colleagues?
Pierre Muller's colleagues are Jared Baumann, Christophe Entringer Mba Phd, Manoj Gupta, Yannick Duc, Milton Weber, Jerome Fabrizio, Ludovic Paquet.
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