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Alessandro Piovaccari Email & Phone Number
Senior Vice President of Engineering
at
SigmaSense
3 work emails found
@silabs.com
4 phones found area 732 and 512
LinkedIn matched
✓ Verified Jun 2026
4 data sources
Profile completeness 100%
Current company
Role
Senior Vice President of Engineering
Location
Austin, Texas, United States
Who is Alessandro Piovaccari? Overview
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Quick answer
Alessandro Piovaccari is listed as Senior Vice President of Engineering at SigmaSense, based in Austin, Texas, United States. AeroLeads shows a work email signal at silabs.com, phone signal with area code 732, 512, and a matched LinkedIn profile for Alessandro Piovaccari.
Alessandro Piovaccari previously worked as Chief Scientist at Circuit and Adjunct Professor at Alma Mater Studiorum – Università Di Bologna. Alessandro Piovaccari holds Advanced Post-Master, Ee from The Johns Hopkins University.
Company email context
Email format at SigmaSense
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{first}.{last}@silabs.com
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Profile bio
About Alessandro Piovaccari
30 years of professional experience in the field of semiconductors and IC, covering a broad range of wireless and ultra-low-power applications. A successful track record in leading innovative projects, developing new products and new markets, from concept to delivery, with more the 4-billion overall device shipment. Successful leader and team player that leverages technology and teamwork for solving real-world problems. Recognized for building strong teams, organizations and relationships between key members of the semiconductors community. Deep understanding of all aspects of semiconductor product life cycle from definition, conception, design, manufacturing, integration, sales and aftermarket service.
Listed skills include Analog, Cmos, Ic, Rf, and 36 others.
Current workplace
Alessandro Piovaccari's current company
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34 roles
Alessandro Piovaccari work experience
A career timeline built from the work history available for this profile.
Chief Scientist
Current
Jul 2024 - Present
Adjunct Professor
Current∙ Electronic Frontiers M (IC Design at the Edge of Moore's Law) - MSEE core course
Jan 2023 - Present
Visiting Fellow
Current∙ Approaches, methods and practices in integrated circuit design in leading fabless companies
Jul 2021 - Present
Visiting Professor
Current∙ Device Physics for IC Designers (Physical Architecture Design) - MSEE /PhD elective course
Apr 2024 - Present
Vice President Of Conferences, Adcom Member, Solid-State Circuits Society (Sscs)
Current
Jan 2022 - Present
Founder And Chair, Chiplets Solution For Custom Ic Design Workshop (Chisic)
Current
Dec 2023 - Present
Member, Special Interest Group On Electronics For Agrifood (Sig Agrifood)
Current
Nov 2023 - Present
Steering Committee Member, Ieee Conference On Agrifood Electronics (Cafe)
Current∙ SSCS Special Sessions Chair 2023
Jul 2023 - Present
Sscs Vice Chair, Central Texas Sscs/Cass Joint Chapter
Current
Jan 2020 - Present
Steering Committee Member, Ieee Custom Integrated Circuit Conference (Cicc)
∙ Chair positions: TPC 2017, Conference 2018, Genera 2019, Strategic Development 2020-2022∙ Conference fundamental re-org 2016 - First SSCS virtual conference 2020
Oct 2015 - Apr 2022
Tpc Member, Ieee Custom Integrated Circuits Conference (Cicc)
∙ Chair positions: Analog Techniques 2013-2014 - Sponsorship 2014
Nov 2008 - Sep 2015
Jul 2021 - Present
Advisory Board Member
Current∙ Semiconductor manufacturing productivity optimization in the age of AI
Aug 2022 - Present
Advisor
Current∙ Harnessing bitcoin denominated debt to build the grid of the future
Apr 2022 - Present
Sep 2021 - Present
Chip Track Advisor
Current∙ High-tech entrepreneurship startup incubator and accelerator
Sep 2021 - Present
Cto Council Member
Current∙ Forum for CTOs from leading semiconductor companies to meet and discuss technology trends
May 2021 - Present
Feb 2024 - Aug 2024
May 2022 - May 2024
Advisory Board Member
∙ Acquired by Ansys in June 2023∙ EDA tools to enable IC engineers designing next-generation ICs
May 2022 - Jun 2023
Technology Council Member
∙ Organization of leading CIOs, CTOs and technology executives
Sep 2018 - Sep 2022
Lifetime Fellow
May 2021 - Jun 2021
Cto & Svp Of Central R&D
∙ Company’s central engineering and the advanced R&D departments∙ Next-gen SoCs HW/SW architectures and IP - RISC-V, edge AI/ML and security cores - advanced process nodes - EDA tools and cloud computing
Oct 2019 - Apr 2021
Cto & Svp Of Engineering
∙ Company’s product and technology R&D, including both hardware and software engineering∙ Low-power Wi-Fi incubator - First low-power Wi-Fi radio officially supported in the Linux kernel
Feb 2015 - Sep 2019
Vp Of Engineering, Broadcast And Iot
∙ IC design engineering R&D for MCUs (8/32-bit), Wireless SoCs (802.15.4, ZigBee, BLE and Sub-GHz), and broadcast audio and video products
Feb 2013 - Jan 2015
Director Of Engineering, Broadcast Video And Wireless
∙ IC design engineering for wireless SoCs (802.15.4, ZigBee) standards, and broadcast video products
Feb 2011 - Jan 2013
Design Engineering Manager, Broadcast Video
∙ Leader and co-architect of the first single-chip worldwide TV tuner∙ Ultra-thin flat-screen TV enabler∙ More than 2B units shipped - Still in production (Skyworks) with 90% market share and adopted by 9 of the top 10 TV manufacturers
Oct 2006 - Jan 2011
Sr. Design Engineer, Broadcast Audio
∙ First hire and major contributor to the single-chip AM/FM tuner / transmitters∙ Almost 2B units shipped - Still in production (Skyworks) - Employed by major manufacturers in iconic products
Nov 2003 - Sep 2006
Founding Member, Board Director
∙ Drove the team responsible to bring the CV32E40P (PULP RI5CY) RISC-V core to industrial-strength level
Jun 2019 - May 2021
Sr. Services Manager
∙ Development and support of SerDes IP in various sub-micron CMOS technologies∙ The SerDes IP have been used in many mainstream products including workstations networking and chip-to-chip links (CPU-GPU) in game consoles
Jul 2001 - Oct 2003
Principal Design Engineer
∙ RFIC and PMIC design engineer (LNAs, RF PAs, LOG amps, RSSI detectors, LDOs, high-speed DACs) for wireless (DECT, Bluetooth, AMPS) and cable products∙ The DECT/BT RFIC was used in very popular cordless phone, in mass production for decadesThe PA was probably one of the first fully-integrated CMOS PA in a commercially available RFIC
Oct 1998 - Jun 2001
Research Scientist
∙ R&D on the field of CMOS neuromorphic image sensors and processor∙ Developed an analog image motion processor based on 2D wave propagation∙ Developed an analog sea-of-gates methodology for fast prototyping of baseband analog ICs, with quick manufacturing turnaround.
Feb 1997 - Sep 1998
Design Engineering Consultant
∙ Developed several integrated circuits, including a BiCMOS AFE for an amorphous silicon X-Ray imager, a BiCMOS AM/FM RFIC preamplifier for automotive short antennas applications, and a CMOS muscle electro-stimulator for rehabilitation therapy
Jul 1993 - Feb 1997
3 education records
Alessandro Piovaccari education
Advanced Post-Master, Ee
The Johns Hopkins University
Ph.D., Eecs
Alma Mater Studiorum – Università Di Bologna
Laurea (Ms), Eecs
Alma Mater Studiorum – Università Di Bologna
FAQ
Frequently asked questions about Alessandro Piovaccari
Quick answers generated from the profile data available on this page.
What company does Alessandro Piovaccari work for?
Alessandro Piovaccari works for SigmaSense.
What is Alessandro Piovaccari's role at SigmaSense?
Alessandro Piovaccari is listed as Senior Vice President of Engineering at SigmaSense.
What is Alessandro Piovaccari's email address?
AeroLeads has found 3 work email signals at @silabs.com for Alessandro Piovaccari at SigmaSense.
What is Alessandro Piovaccari's phone number?
AeroLeads has found 4 phone signal(s) with area code 732, 512 for Alessandro Piovaccari at SigmaSense.
Where is Alessandro Piovaccari based?
Alessandro Piovaccari is based in Austin, Texas, United States while working with SigmaSense.
What companies has Alessandro Piovaccari worked for?
Alessandro Piovaccari has worked for Sigmasense, Circuit, Alma Mater Studiorum – Università Di Bologna, Università Di Pavia, and Ieee.
How can I contact Alessandro Piovaccari?
You can use AeroLeads to view verified contact signals for Alessandro Piovaccari at SigmaSense, including work email, phone, and LinkedIn data when available.
What schools did Alessandro Piovaccari attend?
Alessandro Piovaccari holds Advanced Post-Master, Ee from The Johns Hopkins University.
What skills is Alessandro Piovaccari known for?
Alessandro Piovaccari is listed with skills including Analog, Cmos, Ic, Rf, Mixed Signal, Semiconductors, Electronics, and Integrated Circuit Design.
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