Pragati Kulkarni Email & Phone Number

I have 7+ years of experience as Design and Verification engineer for Graphics IP(GPU). Led complete validation of various complex features in Graphics IP interacting with different teams cross site. This involved all stages from testplan generation, providing inputs to test development, environment bring up, feature bring up tasks in GPU, to regressions failures debugs and coverage coding/ closure. With strong debug expertise debugged failures in different environments - Simulation, Emulation and SOC finding critical bugs early in validation cycle.Coded Bus Function model (BFM) for GPU interface. Provided changes for this BFM for new features or design change, debugged all the regression failures and closed the coverage holes for the BFM. Developed a complete environment and all the collaterals to validate the BFM; as its testbench, to fix the BFM issues early and provide best quality BFM for GPU validation. Developed checkers and trackers at various interfaces to ease complex debugs in huge designsActively involved in integration of complex features into the IP. Worked efficiently to build different config designs, by analyzing and accurately connecting different blocks of the GPU IP for specified config.Led Fuse validation for the Graphics IP for multiple projects, ensuring the data path: fuse download, propagation and endpoint delivery, are bug free; critical for smooth power on. Validated various reduced configs as fuse down modes.Have been awarded at department level for closing all debugs to help deliver high quality IP in reduced TAT. Also been awarded for finding critical bugs in fuse and feature validation. My BFM work was awarded for incorporating new feature changes quickly and providing bug free BFMSkills: GPU Pre-Si Verification | GPU Debug expertise | BFM Coding/Validation | Coverage | Fuse validation | Integration