Hello, I am a passionate Digital Design Engineer with a specialized background in RTL Design, Computer Architecture, Tool Flows, and Functional Verification. Throughout my career, I've been fortunate to work on projects that have sharpened my expertise in these critical domains.My journey in the world of digital design has been marked by significant achievements, including Architectural design and RTL Implementation projects for high-performance, reliable RISC-V processors. Notably, I played a pivotal role in designing and implementing a multi-threaded core that achieved an impressive coremark/MHz rating of 5.01 on a single thread. Ensuring the core's functional safety at the ASIL-D level added an extra layer of complexity, but it's a challenge I eagerly embraced.In addition to my work on RISC-V processors, I have contributed to the development of closed IPs such as the multi-threaded G-Share Branch Predictor, where I even filed a patent for a novel resource optimization approach. Furthermore, my involvement extended to enhancing the RISC-V debug module, where I incorporated essential features into both the core and debug module.My career journey has equipped me with an in-depth understanding of RTL development, optimization techniques, and architectural intricacies, which I continue to apply in my work.Beyond my core technical expertise, I have scripted and designed workflows for various tools integral to the VLSI (Very Large-Scale Integration) industry. This multifaceted exposure has not only expanded my skill set but has also enabled me to streamline processes, driving greater efficiency and productivity.What truly fuels my passion is solving complex real-world problems and contributing to cutting-edge technological advancements. I am unwavering in my commitment to excellence and perpetually seek new challenges that allow me to make a meaningful impact on the world.I invite you to connect with me and explore opportunities where my skills and dedication can help drive innovation and success in your projects.