Prashant Acharya Email & Phone Number

Bengaluru, Karnataka, India

My work @ Tricog involves using Signal Processing and Artificial Intelligence to:Process and Analyze ECG signals to extract key measurements and features to aid Doctors and Cardiologists.Develop Algorithms to use the extracted measurements and features to aid in diagnosis of diseases and conditions of the Heart.Help in designing and developing tools that.

Bengaluru, India

• Designed and implemented an On-ear/ not on-ear algorithm for hearable devices.
• This algorithm uses the accelerometer sensor on the Quicklogic Sensorhub platform to determine if the hearable device is worn i.e. on ear or not.
• Designed and implemented a wireless communication interface using Bluetooth Low Energy. Tools used:
• C, Matlab/Octave, Nordic Semiconductors nRF51 SDK.

Bengaluru Area, India

• Firmware for xDSL broadband modems:
• Re architecting firmware to meet additional processing requirements and improve hardware utilization.
• Performance tuning of xDSL modems.
• Verification of hardware blocks post silicon.
• Matlab simulations/models for Modem receivers.
• Field testing and debugging of xDSL modems to identify potential network and modem issues.

• Engineer and Project Manager
• Technical Lead and co-developer role played in designing, developing and testing an automated test script suite in Python used to test ADSL modems by controlling the modems and the DSL test equipment.
• Quality assurance cum advisory role played to ensure quality of the third party manufactured Amplebit ADSL modems.

• Matlab based simulation of the VDSL2 transceiver.
• Optimized the ADSL modem code for execution cycles running on Intel based P4 processors.
• Worked extensively on Interoperability of the Sasken Host based ADSL2/2+ modem, majority of this work being done at the UNH Interoperability Labs attending Interop Plugfests and testing and debugging Sasken modem.
• Software Design, Development, and Testing of the Sasken Host based ADSL2/ADSL2+ modem.
• Debugging of the modem hardware during the initial stages of modem hardware development, this involved tasks like receive and transmit signal chain verification and verification of the AFE performance.

• Developed and Debugged DSP Software/Algorithms for various modules for the Central Office ADSL Modem.
• Performance Analysis and Tuning of the Central Office ADSL Modem; Tasks include Matlab based system simulation, Filter Design, Tuning the Equalizer algorithms.
• Improved Interoperability of TI Central Office Modems.
• Optimized DSP Software by reducing Program Memory consumption of the ADSL PHY software running on a TMS320C6201 DSP.

Msee, Electrical Engineering

Education record