Prashanthi B Email & Phone Number

8+ years of experience in verification using SV and UVM and SOC verification.

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  Lead Engineer

  Altran

  Sep 2015 - Present - Bengaluru Area, India

  8+ years of experience in VerificationExperience in Verification Environment planning.Experience in Development of Verification documents (Verification plan, Architecture document).Experience in TB development using system Verilog and UVM, VMM.Experience in Constraint Randomization, Coverage Monitor Development.Experience in Coding of functional coverage and assertions.Experience in Models development.Experience in AXI bus protocolsExperience in IP Verification of USB2.0 and AVB Ethernet-Switch Protocols.Experience in Gate Level Simulations with SDF (Having basic knowledge in GLS simulations and debugging).Experience in Running regressions and closing coverage.Experience in BUG reporting and BUG Reproducing.Experience in Low power verification only in block level.Experience in Functional Simulation using NCSIM, Synopsys VCS, QuestaSim, and Modelsim

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  Sindura College Of Engineering And Technology, Jntu Affiliated.

  77%