Pratik Vyas Email & Phone Number

Hey Everyone! I am a passionate EE graduate with a focus on Digital VLSI. My expertise lies in RTL design and Design Verification, supported by proficient skills in Verilog, SystemVerilog, and UVM. Throughout my academic journey, I have worked on various projects centered around digital design and verification of FPGA and ASIC using Verilog, SystemVerilog, and UVM.Additionally, I gained valuable industrial experience as an FPGA intern last summer. Along with this, I have a working knowledge of C and Python, which were part of my undergrad coursework.I am eagerly seeking full-time and internship opportunities as a Digital Design/Verification engineer to apply technical skills for innovation. -> HDL: Verilog, SystemVerilog, UVM, with working knowledge of SVA. ->Programming and Scripting: C, Python, Perl. ->Digital Design concepts: Digital Logic Design, Design Verification, Logic Synthesis, ASIC design flow, FPGA design flow, SoC integration, Static Timing Analysis (STA), Clock Domain Crossing (CDC), and Computer Architecture. ->Tools: Synopsys Primetime, Xilinx Vivado, Cadence Virtuoso, Synopsys VCS, GTK-Wave, Intel Quartus Prime. ->Communication Protocols: APB, AHB-lite, SPI, I2C, UART. ->FPGA Boards: Altera DE10-Lite, Xilinx Nexys A7, Arduino, Xilinx Kria KR 260. -> Soft Skills: Communication Skills, Teamwork, Positive Attitude, and Time Management.If you're looking for a Creative, Self-motivated, and enthusiastic VLSI engineer, I'd love to connect with you to explore potential opportunities to work together. Feel free to reach out to me on LinkedIn or at pratikvyas1998@gmail.com.