Paul "Prem" Sobel Email and Phone Number
CTO and Co-founder MerlinCryption LLC, Award-winning NASA engineer, HW/SW Architect, Algorithmist, Cryptographer at
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MerlinCryption LLC
Paul "Prem" Sobel's Location
Austin, Texas, United States, United States
Paul "Prem" Sobel's Contact Details
Paul "Prem" Sobel work email
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About Paul "Prem" Sobel
Computer Architect (HW and SW), Designer, Engineer, Simulation, Programmer, Mathematician, Algorithmist, Cryptographer. Always being aware of the big picture and the details at the same time while having a vision of the future and where the evolution of a system is going to meet future needs recognizing opportunities as they arise.Principle Engineer: Solves the most complex challenges no one else can figure out.• Reduced memory size by at least 30% in size and increased program speed 50-1000% with efficient algorithms and data structures.• Reduced hardware size from one cubic foot to ½ cubic inch.• Saved $1M per year by reducing manufacturing erroneous test rejects, and correcting design flaws in many systems.• Created improved architecture and software system designs and new project improvements• Multiple CPU Patents• Received individual NASA commendation for automating spacecraft programming.Specialties: Software and hardware architecture, programming algorithms and data structure design, simulation, computer architecture, digital image and signal processing, data visualization, design verification, device drivers, debugging, GUI development; mathematics, architectural and system logic design, data base design, I/O design, developing and using APIs for many systems, hardware/software trade-offs, problem-solving and communications skills; systolic arrays.CPUs: 8051, x86, MIPS, 29000
Paul "Prem" Sobel's Current Company Details
Merlincryption Llc
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CTO and Co-founder MerlinCryption LLC, Award-winning NASA engineer, HW/SW Architect, Algorithmist, Cryptographer
Paul "Prem" Sobel Work Experience Details
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Cto, Co-FounderMerlincryption Llc Apr 2009 - PresentAustin, Tx, Us• Software architect.• Created Quantum Secure ASBE encryption algorithm which defeats statistical analysis and cryptanalysis.• Developed security software with a focus on encryption/decryption products, including (>10) multifactor authentication and a C static library to automate enterprise pairwise communications.• Developed encrypted USB software
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Senior Test EngineerPliant Technology Mar 2010 - Jan 2011Milpitas, Ca, Us• Modify and design and create new functional tests written in C using tester API.• Run functional tests on each firmware release. In case of failure add entry to bug database and gather data and help debug each failure with firmware team.• Gathered coverage information on existing tests to design and implement test plan and tests for additional needed functional tests (written in C using tester API).• Created and maintain web pages, available on Pliant intranet, to document testing procedures and other information needed by engineering team. -
Qa Sw Tool EngineerIntel Jul 2009 - Mar 2010Santa Clara, California, Us• Fixed over 40 bugs in code base, found over 200 bugs in code base.• Wrote thousands of new white code (C++) tests and diagnosed all failing tests• Enhanced automatic test framework to: compare expected 2D image against actual .• Use Klockwork for static code analysis to fix bugs, and BullseyeCoverage for unit tests to increase code coverage and eliminate bad coding practices -
Principal EngineerArc International Nov 2007 - Mar 2009Arques, FrActual company is different - was small British HW/SW IP company, URL is: http://arc.com/ - has since been acquired twice.• Developed automated layout algorithm for HW and SW graph views of a design project in both C and Java to minimize line lengths and number of cross overs.• Implemented a unit test regression system in C plus, perl, and shell scripts.• Created and implemented automated testing methodology for existing and new CAD tools, including implementing over 70 automated tests for Debugger IDE. Also developed test strategy for new Eclipse based CAD tool for multicore SOC systems. • Fixed Java and C bugs in Eclipsed based CAD tool.• Evaluated and recommend various SW tools that were needed and worked with SW tool vendors on their bugs and new feature requests.• Developed installers (and tests for installers) for new CAD tool for windows and linux. -
Principal Engineer / ArchitectLoglogic Jan 2006 - Aug 2007Palo Alto, Ca, Us• Proposed new architectural directions for system and identified existing bad coding practices with recommendations for refactoring.• Proposed systemic debugging infrastructure giving high visibility to system operation.• Developed new algorithims to speed up and correct defects of system hash tables.• Debugged and fixed many parts of the system. -
Consulting EngineerNevis Networks Mar 2005 - Mar 2006Us• Wrote C library API functions for supporting real time multi-threaded embedded network security event correlation system using custom database with query API using 7 dimensional tree data structures for large >4GB event data base. Running and developing additional test cases for this C library. Advising on additional software tools such as PurifyPlus to make sure dynamic memory usage is correct.• Contributing to architecture of network security Event Correlation System and Database with patent application.• Implemented many code speed-ups and bug fixes in different parts of system.• Helped in code reviews, setting coding standards, mentoring, recomending and installing purify and coverity. -
Principal Member Of Technical StaffMotorola Semiconductor Oct 2001 - Apr 2004• Developed software flow to: convert Agilent 93000 tester files to WGL; then convert WGL files to low cost HiLevel tester providing new capability for use in failure analysis including: GUI file viewers/editors and C-shell scripts, and programs to modify verilog files, developed under Sun Solaris Unix.• Prepared and conducted requested tutorials to staff on: array, linked list, tree and graph data structures (especially in C), and image processing tutorials with a focus on noise removal and image enhancement.• Wrote GDS2 (IC layout) file parser and tree data analyzer to save time for use by schematic generation support staff, plus GUI's for viewing several different format file contents.• Consulted in design of Product Analysis Laboratory capability database, now used globally.• Developed name space translator for FastScan and circuit name spaces; participated in the specification, design, coding, and testing of DFS (Diagnostic Fault Simulation) system using trees, graphs, and multidimensional arrays.• Supported Unix, and installed third-party CAD tools • Trained software and failure analysis staff engineers in: CVS, gdb, purify, and FastScan ATPG.• Benchmarked and reviewed internal and external best practices for DFS (Diagnostic Fault Simulation), as well as collectively brainstormed new DFS ideas and practices. resulting in the "fault model independent” approach with logic trees.
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Staff EngineerObsidian Software Mar 2000 - Jun 2001• Fixed bugs and added features to new QT based GUI, all developed under Linux for Unix.• Fixed bugs (improving success from 67% to 98%) and added the features for random loops and subroutines, to the random program generator product running under Linux or Unix.• Developed hundreds of tests, for both the random program generator, and the new GUI.• Conducted verification consulting to Obsidian Software customers in their new DSP, with functional coverage measurements, and discovered 187 bugs in customer systems.• Rewrote MIPS exception handlers with an efficiency increase of 35% for size and speed.
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Contract ProgrammerWellmax Apr 1999 - Apr 2000• Developed a Microsoft Access-based medical application for lab results and diagnostic purposes with over 100 pages of VB code, and 40 sets of tables, forms, queries, and reports.• Conducted requirements analysis with medical staff: physician, nurses, physical therapists, and clinical laboratory staff. Improved calculation efficiency from 30 minutes to three seconds.
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Contract EngineerPhilips Semiconductors Jul 1994 - Dec 1999• Upgraded MIPs simulator to support different derivatives or variations of MIPs core.• Wrote random program generator for MIPs architecture which is used in conjunction with verilog model to generate many millions of instructions and combinations to test design to achieve design correctness on first silicon.• Enhanced the random program generator, adding many features for multiple MIPs cores, finding dozens of design flaws in each CPU.• Developed X-Motif-based instruction set simulator and other tools in C for MIPs core project, all developed under HP AIX, and later, under Unix/Linux.• Wrote test programs for MIPs core, in assembly language, and mentored other test development.• Converted Verilog test bench for I2C into MIPs assembly language.• Reviewed and contributed to the architecture of new XA controller chip (16 bit 8051).• Helped test VHDL model for functional correctness and first silicon.• Wrote assembly language test programs, and developed software tools in C, for new XA 16 bit CPU and peripherals (serial and I2C).
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Senior AnalystMuse Technologies Feb 1995 - Jun 1999• Updated a Muse application, developed for the Navy, to have target-relative teleport, and enhanced GUI interface embedded in 3D space. Reduced learning time from two years to two months. System included the capability to view sonar data, along with under water terrain.• Completed demo applications and documentation for the collision library.• Developed a volumetric, iso-surface routine: wrote the program to write the program.• Developed point cloud estimation routines.• Developed system documentation and demonstration training programs.• Developed a Muse application to view simulated air combat with interaction of ground-based facilities, including the means to filter out categories of objects, and a means to intelligently and dynamically subset what objects are viewed.• Co-developed a Muse application to view large-scale traffic simulation: 250,000 vehicles with trip plans, with indexed trees to enable real-time access of the 1GB simulation data.• Co-developed a Muse application to statistically view measured traffic data, including a generalized statistical module for generating multi-dimensional graphs of various kinds, using a set of database query options.• Co-developed fast, 3D object, collision-detection library functions.• Developed a fast, 3D volumetric, iso-surface library function (with voids).• Developed a GUI for the Muse system in 3D space.
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Professor Of EngineeringS.A.I.C.E. University Aug 1989 - Jun 1994• Conducted computer science and electrical engineering courses, and research in mathematics.• Managed, and contributed to, various university hardware and software projects: electric car electronics, and image processing of scanned images (photos and text).
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Member Of Technical Staff / Senior ScientistAdvanced Micro Devices Mar 1987 - Jul 1989Santa Clara, California, Us• Developed product planning and system architecture for 29K RISC processors• Extended the 29K Architectural Simulator: added features and CPU variants. Simulator used to find customer's interrupt handler error.• Contributed new patented features to 29050 architecture• Reviewed new products from a systems viewpoint, conceived new product ideas; facilitated brainstorming• Analyzed PAL design database to determine parameters & architectures for new families of programmable devices• Developed algorithms for CAD software to support new programmable devices, made tradeoffs with actual device architecture, structure and parameters• Conducted market analysis for new products, designed market info database for: industry leaders, semiconductor content, product mix; and technological trends (used to eliminate products losing money) -
Founder / Principal Engr / Chief ScientistVitesse Electronics (Now Vitesse Semi) Aug 1984 - Feb 1987• Contributed to the architecture and design of new mini supercomputer: Involved with hardware/software tradeoffs, contributed to software design environment, worked extensively on multi processor features, Developed algorithms and optimizations for application programs and compiler work• Worked as liason between hardware and software teams.• Designed and wrote a cycle accurate architectural simulator for new computer, operating at the register transfer level with full details on the control logic: verified the new concepts, helped tune the architecture, found and fixed many hardware bugs -
Research EngineerNorthrop Grumman Jul 1981 - Aug 1984Falls Church, Va, Us• Project & Design Engineer for algorithm development of Automatic Target Recognizer: system design and developed the system simulator• Redesigned the architecture & designed part of logic to fit a special purpose digital signal processor (less memory) into 2 gate arrays• Guided other engineers also working on these chips• Wrote a program of register level transfer model of the chips to generate test vectors• Designed extensible high level language for and wrote an Image Processing Algorithm (Interpretive) Simulator – switching from Fortran to C• Help designed architecture and algorithms for a multipurpose signal processor• Designed a set of patented signal processor chips for a real-time systolic array architecture• Developed extensive image processing algorithms • Worked on architecture and software requirements for a programmable Digital Signal Processor System, and participated in design details for some of the algorithms, the database and hardware reviews -
Prinipal Member Of Engineering StaffXerox Nov 1978 - Jul 1981Norwalk, Connecticut, Us• Helped define VLSI & system architecture requirements for Document Processor with graphics capability• Helped develop logic design/architecture for Video Generation VLSI chip• Wrote functional software simulator for Video Generation chip • Created architectural design and specification for Cache & Bus Interface chip and for DRAM controller with ECC• Developed an evaluation, study, and beta test of new internal CAD layout tool; includedng a layout of portion of the 16 bit cpu• Conducted classes in tool use• Designed architectural specification & initial logic design for 16 bit cpu; did detail design released to team of engineers circuit and layout staff• Designed and supervised simulation and debug of burst mode time multiplexed system bus VLSI sub chip macro; (in later release changed it to a deferred response bus)• Co-developed specifications for a CAD tool which reads graphics files and analyzes the logic circuit to make a net list -
Principle EngineerPerkin Elmer Data Systems Sep 1976 - Nov 1978• Designed minicomputer system: participated in CPU chip design, responsible for I/O Memory interrupt control chip design, virtual memory mapping chip design for 16/32 bit microprocessor chip set• Wrote (and currently own) a program to reduce logic equations, achieving 40% reduction in a CPU control PLA• Worked on team for new 32 bit products• Initially participated in evolution and design of system architecture• Developed CPU micro architecture and detailed design of pipeline logic• Developed I/O subsystem design• Developed functional simulation for cache memory logic
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Professor Of EngineeringS.A.I.C.E. University Jun 1972 - Jul 1976• Conducted computer science and electrical engineering courses• Installed minicomputer system• Designed and implemented a Centronics printer interface and driver• Conducted research in education.
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Member Of Technical StaffJet Propulsion Laboratory Aug 1967 - Jun 1972• Participated in mission planning for Viking `75 and Mariner Venus Mercury `73 missions.• Cognizant Engineer for Mariner Mars `71 flight computer software, plus member of mission design team. This included the design and implementation of a special purpose compiler for automatic inflight programming of the flight computer with all scientific and engineering events in conjunction with helping to specify the overall software system. Received an individual NASA commendation.• Mariner Mars `69 Mission and design and flight operations team member (also participated in software design and implementation).• I/O architecture and interface design for the STAR (Self testing & Repairing) computer; design and built several I/O interfaces.
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Graduate AssociateIbm Jun 1966 - Aug 1966Armonk, New York, Ny, UsIn the summer between my Bachelors and Masters degree, I determined the cause of an erroneous reed switch manufacturing test failure rejection rate of 40% that their senior engineers could not understand. This saved over $1,000,000 per year for over 10 years in rejected good reed switches.
Paul "Prem" Sobel Skills
Embedded Systems
Debugging
System Architecture
C
Software Development
Algorithms
Testing
Unix
Firmware
Device Drivers
Perl
Data Visualization
Software Design
Shell Scripting
Assembly Language
Linux
Embedded Software
Digital Signal Processors
Computer Architecture
Simulations
Programming
C++
Operating Systems
Semiconductors
Architecture
Multithreading
Test Automation
Java
Xml
Eclipse
Apis
Verilog
Hardware Architecture
Processors
Microprocessors
Distributed Systems
Software Engineering
C#
Discrete Mathematics
Cvs
Cloud Computing
Simulation
Gui Development
Subversion
Team Facilitation
Design Verification Testing
Mathematics
Api
Intuitive Idea Synergyst
Number Theory
Paul "Prem" Sobel Education Details
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CaltechElectrical Engineering -
Pratt InstituteElectrcial Engineering
Frequently Asked Questions about Paul "Prem" Sobel
What company does Paul "Prem" Sobel work for?
Paul "Prem" Sobel works for Merlincryption Llc
What is Paul "Prem" Sobel's role at the current company?
Paul "Prem" Sobel's current role is CTO and Co-founder MerlinCryption LLC, Award-winning NASA engineer, HW/SW Architect, Algorithmist, Cryptographer.
What is Paul "Prem" Sobel's email address?
Paul "Prem" Sobel's email address is pr****@****ink.net
What is Paul "Prem" Sobel's direct phone number?
Paul "Prem" Sobel's direct phone number is +180354*****
What schools did Paul "Prem" Sobel attend?
Paul "Prem" Sobel attended Caltech, Pratt Institute.
What are some of Paul "Prem" Sobel's interests?
Paul "Prem" Sobel has interest in Software Architecture, Study Of Consciousness, Foundations Of Science, Science Fiction, Algorithms And Mathematics.
What skills is Paul "Prem" Sobel known for?
Paul "Prem" Sobel has skills like Embedded Systems, Debugging, System Architecture, C, Software Development, Algorithms, Testing, Unix, Firmware, Device Drivers, Perl, Data Visualization.
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