Rabin Dhakal

Rabin Dhakal Email and Phone Number

Litho Process Engineer at Intel Corporation @ Intel Corporation
santa clara, california, united states
Rabin Dhakal's Location
Chandler, Arizona, United States, United States
Rabin Dhakal's Contact Details

Rabin Dhakal personal email

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About Rabin Dhakal

Electrical Engineer with more than decade of semiconductor process development and optimization in advanced tech nodes. Expertise in lithography process development for front end process, FE process integration and Yield analysis. DOE, FMEA in semiconductor process development as well as high volume ramp. Knowledgeable in data mining and analyzing using JMP and advanced excel user. Interest include device physics, semiconductor equipment and process development, process integration and reliability and yield engineering. .

Rabin Dhakal's Current Company Details
Intel Corporation

Intel Corporation

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Litho Process Engineer at Intel Corporation
santa clara, california, united states
Website:
intel.com
Employees:
133841
Rabin Dhakal Work Experience Details
  • Intel Corporation
    Litho Process Engineer
    Intel Corporation Jan 2019 - Present
    Phoenix, Arizona Area
  • Globalfoundries
    Sr. Engineer Process Engineering
    Globalfoundries Jan 2018 - Nov 2018
    Malta, Ny
    -BEOL etch process owner for dielectric via and pad etch on LAM and TEL tools in 14 nm and less technology nodes. BEOL SPC, Cpk champion and responsible for driving Cpk improvement projects for different process.-Process Control in high volume manufacturing using statistics process control (SPC), advanced process control (APC), fault detection and classification (FDC) and 6 sigma principles.-Reduce defects and scraps by using design of experiment (DOE) and structured problem solving (SPS) methods -Interface with equipment engineers, management and operations to improve cycle time, tool availability and cost reduction.-Prepared Out of control action plans (OCAP), recovery guidelines for tools and process
  • University Of Pennsylvania
    Postdoctoral Fellow
    University Of Pennsylvania Oct 2016 - Jan 2018
    Philadelphia, Pa
    CVD deposition of Carbon nanotubes on the pulled glass pipettes to make carbon nano pipettes (CNPs) for use in electrochemistry, sensors and cell electrophysiology applications. Determined tRNA translocation rate in the animal cells from cytoplasm to nucleus under various nutrition and other stress situation by direct injection of tRNA to cell using CNPs.
  • Iowa State University
    Research Assistant
    Iowa State University Aug 2012 - Sep 2016
    Ames, Ia-50010
    Semiconductor and polymer process development for microelectronics devices and MEMS.1. Design of long pitch 1D Ag grating structures to optimize the optical absorption in P3HT solar cell in higher wavelength regime by utilizing the combination of lateral fabry perot resonance and wave guiding mode enhancement.2. Process development to fabricate Silver grating structure by metallization followed by ebeam lithography and laser interference lithography followed by wet etching and lift off process.3. Fabrication of inverted solar cell structure with transport layers of Cs2CO3 and V2O5 layers and ITO top contact layer on the Ag grating substrate. 4. Optical characterization setup design to measure the total enhancement due to grating structure. I used using spectrophotometer with inverted microscopic objective to selectively image only the patterned surface, beam splitter to measure reflection and polarizer to filter the light with only certain polarization state. 5. Si wafer processing to fabricate the CMOS inverter. We used 3" wafers, RCA cleaning process, Wet and dry oxidation, nitride growth, P and B doping, photo-lithography and developing the etching and liftoff process. 6. Thin film and device characterization including QE, IV, CV, Cf, DLCP, TLM and hall measurements to measure the mobility, deep as well as interface defect distribution, density of states, absorption and charge transfer dynamics. 7. Design of micro-lens solar concentrator mimicking compound eye of insect for wide acceptance angle tracking free design and MEMS light level controller using fTIR principle.9. Process development to make nanoscale patterns on the polymer films. The patterns first developed on the Si wafer using DRIE process and transferred to PDMS using soft lithography. Finally imprinted was well as drop casted the PS or PLLA films. 10. Fabrication of free standing - PDMS pillar for sensors application by directly drawing the PDMS using micro sphere probe.
  • Iowa State University
    Teaching Assistant
    Iowa State University Aug 2011 - May 2012
    Ames, Ia-50010
    Lab instructor for Electric circuits (EE 201) and course instructor for semiconductor devices and materials (EE 332)
  • South Dakota State University
    Research Assistant - Photovoltaic Research Group
    South Dakota State University Aug 2008 - Aug 2011
    Brookings, Sd-57007
    Gained expertise in fabrication and characterization of thin film inorganic and organic Solar Cells1. Developed two different routes to make compound semiconductor AlSb film with optimized optical and electrical properties. First method used co-sputtering and annealing process while second method used electroplating from ionic solution. 2. Process developing to fabricate CuzZnSnS4 thin film with optimized optical/electrical properties by solgel method using salt solution of Cu, Zn and Sn and subsequent annealing process in the S environment . 3. Fabrication of miso-porous TiO2 layer and vertically oriented ZnO nano-rod using solgel and chemical bath deposition. Passivation of miso-porous TiO2 contact layer in organic solar cell structures including bulk hetro-junction organic solar cells or desensitized solar cell using atomic layer deposition (ALD) of HfO2. 4. Study of effect of annealing on the initial charge and energy transfer dynamics in P3HT/PCBM and ZnO-TiO2/P3HT-PCBM solar cells using femtosecond time resolved fluorescent study. 5. Design and fabrication of organic/inorganic photovoltaic structures using hyper branched phthalocyanines absorbers.
  • Nepal Electricity Authority
    Engineer
    Nepal Electricity Authority Mar 2006 - Jul 2008
    Kathmandu, Nepal
  • Lecturer
    Tribhuvan University - Kathmandu Engineering College
    Lecturer Feb 2005 - Mar 2006
    Kathmandu, Nepal
    Course instructor for semiconductor devices and materials and control system theory.

Rabin Dhakal Skills

Semiconductor Device Semiconductor Process Technology Characterization Photovoltaics Nanotechnology Spectroscopy Scanning Electron Microscopy Matlab Labview Comsol C++ Microsoft Office

Rabin Dhakal Education Details

Frequently Asked Questions about Rabin Dhakal

What company does Rabin Dhakal work for?

Rabin Dhakal works for Intel Corporation

What is Rabin Dhakal's role at the current company?

Rabin Dhakal's current role is Litho Process Engineer at Intel Corporation.

What is Rabin Dhakal's email address?

Rabin Dhakal's email address is rd****@****ate.edu

What is Rabin Dhakal's direct phone number?

Rabin Dhakal's direct phone number is +151529*****

What schools did Rabin Dhakal attend?

Rabin Dhakal attended Iowa State University, South Dakota State University, Tribhuvan University.

What skills is Rabin Dhakal known for?

Rabin Dhakal has skills like Semiconductor Device, Semiconductor Process Technology, Characterization, Photovoltaics, Nanotechnology, Spectroscopy, Scanning Electron Microscopy, Matlab, Labview, Comsol, C++, Microsoft Office.

Who are Rabin Dhakal's colleagues?

Rabin Dhakal's colleagues are John Pontier, Jeff Andrews, Olga Evans, Nguyen Hung Tam, Jean-Hugues Decker, Ashley Goernitz, Mohd Sukri Mohd Rosli.

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