Rach Liu, Ph.D.
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Rach Liu, Ph.D. Email & Phone Number

Machine Learning Engineer at Reducto
Location: Redwood City, California, United States 8 work roles 4 schools
1 work email found @ixl.com 1 phone found area 650 LinkedIn matched
✓ Verified July 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email · 1 phone

Work email r****@ixl.com
Direct phone (650) ***-****
LinkedIn Profile matched
3 free lookups remaining · No credit card
Current company
Role
Machine Learning Engineer
Location
Redwood City, California, United States
Company size

Who is Rach Liu, Ph.D.? Overview

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Quick answer

Rach Liu, Ph.D. is listed as Machine Learning Engineer at Reducto, a with 22 employees, based in Redwood City, California, United States. AeroLeads shows a work email signal at ixl.com, phone signal with area code 650, and a matched LinkedIn profile for Rach Liu, Ph.D..

Rach Liu, Ph.D. previously worked as Machine Learning Engineer at Meta and Machine Learning Engineer at Wiser Solutions, Inc.. Rach Liu, Ph.D. holds Master Of Science - Ms, Computer Science from Ucla.

Company email context

Email format at Reducto

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*@ixl.com
68% confidence

AeroLeads found 1 current-domain work email signal for Rach Liu, Ph.D.. Compare company email patterns before reaching out.

Profile bio

About Rach Liu, Ph.D.

I am a Canadian citizen and a US permanent resident. I was born in Taiwan and grew up in Canada since 5.

Listed skills include Vlsi, Asic, Analog, Analog Circuit Design, and 15 others.

Current workplace

Rach Liu, Ph.D.'s current company

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Reducto
Reducto
Machine Learning Engineer
San Francisco, California, United States
Website
Employees
22
AeroLeads page
8 roles

Rach Liu, Ph.D. work experience

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Role listed

San Francisco, California, United States

Machine Learning Engineer

Current

Menlo Park, Ca, Us

Jun 2024 - Present

Machine Learning Engineer

San Mateo, Ca, Us

Automated product matching: using ML, NLP to solve the entity-matching problem (noun-coreference problem).• Machine-Learning Modeling (1y 5m): Classifiers for product matching: text-matching classifiers, meta-model classifiers combining text, taxonomy information. 2-stage designs: high-recall cluster-models & IR retrieval (Candidate Generation), then high-precision matching-models. Text-categorization modeling using Transformer-based embeddings, static-embeddings, and traditional, TFIDF approaches. Feature-engineering on text. Text-similarity modelling on Product entities using NLP techniques and embeddings.Neural-network modeling: BERT; Other Transformer-based models (S-BERT, etc); CNN models (PyTorch, Tensorflow, HuggingFace).Traditional ML modeling: Random-forest, SVM, SGD, Multinomial Logistic Regression (SkLearn), Boosted-Trees (XGBoost).Transformer-based text-embeddings: using BERT, Transformer-based models.Static text-embeddings: using Fasttext, Word2Vec, Glove, Doc2Vec.• ML Product-matching streaming service (2 mo): ML inference w/ message-streaming arch (NATs, FastAPI, Redis, SQL, Kubernetes)• ML Product-similarity service (2 mo): REST API with Interfaces for Operations (Python FastAPI, React (TypeScript))

Sep 2022 - May 2024

Ms Student, Computer Science

Los Angeles, Ca, Us

Masters in Computer Science and ResearchRelevant Coursework: Graduate CS, UCLA: • Machine Learning (AI) • Automated Reasoning (AI) • Natural Language Processing (AI,IR) • Bayesian Networks (AI) • Neural Networks & Deep Learning (AI) • Reinforcement Learning (AI) • Probabalistic Programming & Relational Learning (AI,PL) • Static Program Analysis (PL) • Type Theory & Prog.Lang(PL) • Big Data Systems (IR) • Linear Programming (Optimization) • Applied Probability (Stats)Upper-division CS, UCLA: • Algorithms and Complexity • Artificial Intelligence • Databases & DBMS • Datamining • Formal Languages & Automata Theory (Computability) • Prog. Languages (PL) • Compilers • Operating Systems • Computer Networks • Computer Graphics • Web ApplicationsUpper-division Statistics, UCLA: • Probability • Mathematical Statistics • Linear Models (MLR) • Data Analysis & Regression • Design & Analysis of Experiments • Statistical Models & Data Mining • Optimization for Statistics • Monte Carlo Methods (Audit)

Sep 2018 - Jun 2022

Core-Platforms Software Engineer, Full-Stack Software Engineer

San Mateo (San Francisco Bay Area), Ca, Us

Next 2.5 years: Backend Engineer, Core Technology team:• Design of custom, high-performance backend infrastructure (Java, Node.js)• Product job-queue service (Java, SQL)• High-performance streaming systems (Kafka, Redis, Java, Node.js, Docker, Socket.io)• Production log infrastructure (100 prod servers, TBs/day prod data) (Java, AWS)• Telemetry front-end app for core-infra (React, Flux, Node.js, JavaScript, AJAX, Material Design)• Customized SFTP server for customer data sync (Node.js, Docker, AWS)First 2 years: Full-Stack Product Engineer, working on production features and design:• Java backend design and data-model design (Java, Hibernate, Struts)• Custom high performance database controllers, query optimization, db tuning (Java, JDBC, SQL, Query Optimization)• Database entity extractor (Java, SQL)• Web-based file-system file deletion scheduler (Java, SQL)• Front-end design: product pages, word-search game (React, JavaScript, AJAX)

Mar 2014 - Jun 2018

Senior Engineer, R&D

Qualcomm Research

• Integrated circuit designer in custom digital and VLSI ASIC design for ultra low-power & low-voltage near-threshold circuits and CPU.• Software & scripting development for near-threshold circuit design and characterization.• Taped-out in 28nm.

Jun 2011 - Aug 2012

Graduate Student Instructor (Teaching Assistant)

University Of Michigan, Ann Arbor

• Course: EECS 216, Signals and Systems • Course topics: CT LTI systems, Freq. resp, filtering, Fourier and Laplace, basic analog comm and feedback control • Taught recitation (discussion) sections, 100 students.

Jan 2011 - Apr 2011

Ph.D. Graduate Student

University Of Michigan, Ann Arbor

• VLSI and custom digital integrated circuit design for on-chip variation sensing, tuning, and mitigation. • Ultra low power design in sub and near threshold.• VLSI tool design and automation.• Taped out in 180nm, 130nm, 90nm, 65nm, 45nm.

Sep 2006 - Apr 2011
4 education records

Rach Liu, Ph.D. education

Master Of Science - Ms, Computer Science

Ucla

Ph.D., Electrical Engineering

University Of Michigan, Ann Arbor

B. Sc., Honors, Electrical Engineering And Computer Science (Eecs)

University Of California, Berkeley

School Captain Scholar (Valedictorian)

St. Michaels University School
FAQ

Frequently asked questions about Rach Liu, Ph.D.

Quick answers generated from the profile data available on this page.

What company does Rach Liu, Ph.D. work for?

Rach Liu, Ph.D. works for Reducto.

What is Rach Liu, Ph.D.'s role at Reducto?

Rach Liu, Ph.D. is listed as Machine Learning Engineer at Reducto.

What is Rach Liu, Ph.D.'s email address?

AeroLeads has found 1 work email signal at @ixl.com for Rach Liu, Ph.D. at Reducto.

What is Rach Liu, Ph.D.'s phone number?

AeroLeads has found 1 phone signal(s) with area code 650 for Rach Liu, Ph.D. at Reducto.

Where is Rach Liu, Ph.D. based?

Rach Liu, Ph.D. is based in Redwood City, California, United States while working with Reducto.

What companies has Rach Liu, Ph.D. worked for?

Rach Liu, Ph.D. has worked for Reducto, Meta, Wiser Solutions, Inc., University Of California, Los Angeles, and Ixl Learning.

How can I contact Rach Liu, Ph.D.?

You can use AeroLeads to view verified contact signals for Rach Liu, Ph.D. at Reducto, including work email, phone, and LinkedIn data when available.

What schools did Rach Liu, Ph.D. attend?

Rach Liu, Ph.D. holds Master Of Science - Ms, Computer Science from Ucla.

What skills is Rach Liu, Ph.D. known for?

Rach Liu, Ph.D. is listed with skills including Vlsi, Asic, Analog, Analog Circuit Design, Digital Circuit Design, Low Power Design, Circuit Design, and Software Development.

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