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Rajath Umesh Joshi Email & Phone Number
MTS Silicon Design Engineer
at
AMD
1 work email found
@amd.com
LinkedIn matched
✓ Verified May 2026
4 data sources
Profile completeness 100%
Current company
Role
MTS Silicon Design Engineer
Location
Santa Clara, California, United States
Company size
Who is Rajath Umesh Joshi? Overview
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Quick answer
Rajath Umesh Joshi is listed as MTS Silicon Design Engineer at AMD, a company with 44382 employees, based in Santa Clara, California, United States. AeroLeads shows a work email signal at amd.com and a matched LinkedIn profile for Rajath Umesh Joshi.
Rajath Umesh Joshi previously worked as Senior Silicon Design Engineer at Amd and Graduate Technical Intern at Intel Corporation. Rajath Umesh Joshi holds Master'S Degree, Computer Engineering from Syracuse University.
Company email context
Email format at AMD
This section adds company-level context without repeating Rajath Umesh Joshi's masked contact details.
{first_initial}{last}@amd.com
79% confidence
AeroLeads found 1 current-domain work email signal for Rajath Umesh Joshi. Compare company email patterns before reaching out.
Profile bio
About Rajath Umesh Joshi
Former Physical Design Engineer at Intel Corporation. Professional Experience in VLSI back-end Design and Verification. Academic and Internship Experience in VLSI front-end Design and Verification.
Listed skills include Logic Design, Computer Architecture, Very Large Scale Integration, Digital Ic Design, and 18 others.
Current workplace
Rajath Umesh Joshi's current company
Company context helps verify the profile and gives searchers a useful next step.
Amd
5 roles
Rajath Umesh Joshi work experience
A career timeline built from the work history available for this profile.
Mts Silicon Design Engineer
Current
Jun 2024 - Present
Senior Silicon Design Engineer
Feb 2021 - Jun 2024
Graduate Technical Intern
Responsibilities as an intern in the High Performance Computing Group included Verilog and SystemVerilog RTL design of sub-blocks for various IPs.Performed lint checks on the sub-blocks using SpyGlass Lint and cleaned up lint violations by making RTL edits.Carried out Clock Domain Crossing checks on IPs using SpyGlass CDC, debugged and rectified Clock.
Jun 2019 - Dec 2019
Physical Design Engineer
I was part of IACG (Intel Architecture Core Group) which is responsible for designing next-generation Intel Microprocessors that drive Servers, Laptops and Desktops. My team was involved in the design of Microprocessor Cores. I designed Datapath as well as RLS Functional Unit Blocks (FUBs) pertaining to the execution cluster. I was responsible for the.
Aug 2016 - Dec 2017
Team & coworkers
Colleagues at AMD
Other employees you can reach at amd.com. View company contacts for 44382 employees →
ZR
Zikri R
Colleague at AmdJambi, Indonesia, Indonesia
View →
KS
Kris Socha
Colleague at AmdToronto, Ontario, Canada, Canada
View →
KW
Kristol Wayman
Colleague at AmdAustin, Texas Metropolitan Area, United States
View →
OE
Oh Eng Wei
Colleague at AmdBayan Lepas, Penang, Malaysia, Malaysia
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KF
Kevin Ferreira
Colleague at AmdGreater Boston, United States
View →
LR
Leo Reyes
Colleague at AmdGreater Seattle Area, United States, United States
View →
ML
Melissa Lam
Colleague at AmdGreater Toronto Area, Canada, Canada
View →
LD
Lejla Džaferagić
Colleague at AmdDublin, County Dublin, Ireland, Ireland
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MF
Mark Fuselier
Colleague at AmdAustin, Texas, United States, United States
View →
BN
Bulelwa Njoli
Colleague at AmdJohannesburg, Gauteng, South Africa, South Africa
View →
Zikri R
Colleague at AmdJambi, Indonesia, Indonesia
View →
KS
Kris Socha
Colleague at AmdToronto, Ontario, Canada, Canada
View →
KW
Kristol Wayman
Colleague at AmdAustin, Texas Metropolitan Area, United States
View →
OE
Oh Eng Wei
Colleague at AmdBayan Lepas, Penang, Malaysia, Malaysia
View →
KF
Kevin Ferreira
Colleague at AmdGreater Boston, United States
View →
LR
Leo Reyes
Colleague at AmdGreater Seattle Area, United States, United States
View →
ML
Melissa Lam
Colleague at AmdGreater Toronto Area, Canada, Canada
View →
LD
Lejla Džaferagić
Colleague at AmdDublin, County Dublin, Ireland, Ireland
View →
MF
Mark Fuselier
Colleague at AmdAustin, Texas, United States, United States
View →
BN
Bulelwa Njoli
Colleague at AmdJohannesburg, Gauteng, South Africa, South Africa
View →
2 education records
Rajath Umesh Joshi education
Master'S Degree, Computer Engineering
Syracuse University
Bachelor Of Engineering - Be, Electrical, Electronics And Communications Engineering
Dayananda Sagar College Of Engineering, Bangalore
FAQ
Frequently asked questions about Rajath Umesh Joshi
Quick answers generated from the profile data available on this page.
What company does Rajath Umesh Joshi work for?
Rajath Umesh Joshi works for AMD.
What is Rajath Umesh Joshi's role at AMD?
Rajath Umesh Joshi is listed as MTS Silicon Design Engineer at AMD.
What is Rajath Umesh Joshi's email address?
AeroLeads has found 1 work email signal at @amd.com for Rajath Umesh Joshi at AMD.
Where is Rajath Umesh Joshi based?
Rajath Umesh Joshi is based in Santa Clara, California, United States while working with AMD.
What companies has Rajath Umesh Joshi worked for?
Rajath Umesh Joshi has worked for Amd and Intel Corporation.
Who are Rajath Umesh Joshi's colleagues at AMD?
Rajath Umesh Joshi's colleagues at AMD include Zikri R, Kris Socha, Kristol Wayman, Oh Eng Wei, and Kevin Ferreira.
How can I contact Rajath Umesh Joshi?
You can use AeroLeads to view verified contact signals for Rajath Umesh Joshi at AMD, including work email, phone, and LinkedIn data when available.
What schools did Rajath Umesh Joshi attend?
Rajath Umesh Joshi holds Master'S Degree, Computer Engineering from Syracuse University.
What skills is Rajath Umesh Joshi known for?
Rajath Umesh Joshi is listed with skills including Logic Design, Computer Architecture, Very Large Scale Integration, Digital Ic Design, Assembly Language, Physical Verification, Perl, and Rtl Design.
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