Define, plan and drive IP projects and program plans based on management and senior technical guidance; Participating in the development of project plans, schedules and resource allocation; Supporting Engineering management to drive execution excellence, including key metrics like Time-to-Market and Quality Indicators; Working collaboratively with the AMD Program Management community to track Key Metrics and help continuous process improvement; Managing risks and issues and taking corrective actions; Co-ordinating projects and their inter-dependencies; Managing stakeholders communication; Aligning the deliverables to program's outcome; Producing accurate and timely reporting of program status throughout its lifecyle.

Manage product bringup, testing and manufacturing of SPARC CMT microprocessors and ASICs at vendor sites in Taiwan. Manage progress and prioritize activities to ensure program schedules are on track. Communicate project progress to upper management and stake holders at regular intervals. Drive and manage production yields at wafer test and final(package) test. Initiate yield debug and enhancement activities. Manage and ensure hardware readiness for manufacturing. Manage release of all manufacturing specs to facilitate seamless start of production activities. Chair weekly meetings to discuss overall project priorities and plans.

Project lead for SPARC CMT processors designed for the volume space. Primarily focused on managing overall productization activities and schedules on all CMT SPARC microprocessors. Responsibilities included:=> Generate productization schedule and get buy-in from all stakeholders to the overall plan.=> Manage and track project resources and project schedules across chip teams.=> Manage, Drive and Co-ordinate all silicon bring-up and debug activities.=> Maintain, track and drive resolution to all post-silicon bugs.=> Communicate project status/updates to upper management on a weekly/bi-weekly basis.=> Track product yields and chart plans for yield improvement activities.=> Interface and Co-ordinate with system partners on requirements and plans.=> Manage and Drive CPU supply schedule to ensure overall project schedule is on track.=> Manage Risk and initiate risk mitigation plans.=> Track lot start plan and unit supply requirements.=> Drive CPU test quality metrics and continuous improvement plans.=> Discuss and influence test/manufacturing solutions.