Randy Grover Email and Phone Number

Leading the worldwide ASIC program management team to ensure all aspects of each design project operates smoothly, meets budget and schedule from architectural definition through final product system level validation. Areas of expertise required include compute platform oversight, EDA software pool contract negotiations and maintenance, resource staffing management, annual budget planning and tracking, risk assessment and mitigation, 3rd party IP and foundry relationships, cross-functional… Show more Leading the worldwide ASIC program management team to ensure all aspects of each design project operates smoothly, meets budget and schedule from architectural definition through final product system level validation. Areas of expertise required include compute platform oversight, EDA software pool contract negotiations and maintenance, resource staffing management, annual budget planning and tracking, risk assessment and mitigation, 3rd party IP and foundry relationships, cross-functional team dependencies and communications, and personnel growth and management. Show less

ASIC and Semiconductor supply chain component liaison working with the worldwide system architectural and ASIC teams to understand next generation requirements including cost, power, performance, functionality, IP and timelines to ensure selection of the best supplier solutions available that meet or exceed a complex set of needs and challenges associated with future product development programs.

 Primary technical interface to customer for development and technical challenges (Logic, Verification, PD) Responsible for all aspects of SoC development (RTL2GDS) (100+ engineers / multiple US locations) Drive low power and high performance tuning of SIMD architecture on exascale processor Responsible for resolving all technical issues between customer and HCL Owner of quality, cost and delivery to schedule Work with customer to understand product lifecycle… Show more  Primary technical interface to customer for development and technical challenges (Logic, Verification, PD) Responsible for all aspects of SoC development (RTL2GDS) (100+ engineers / multiple US locations) Drive low power and high performance tuning of SIMD architecture on exascale processor Responsible for resolving all technical issues between customer and HCL Owner of quality, cost and delivery to schedule Work with customer to understand product lifecycle requirements and align design execution tasks Escalation of design challenges to executive management along with proposed solutions Tracking the effort and cost associated with the SoC, subsystem and IP development Monitoring execution versus schedule and developing mitigation plans to offset delays Drive continuous process improvement philosophy throughout multi-site design teams Show less

ASIC design / project manager responsible for customer interface and design implementation from initial design handoff through release to manufacturing and advanced 2.5D package design. Oversee all aspects of the ASIC design process and worldwide team member execution of tasks. Insure the design keeps pace with cost and schedule requirements. Communicate and coordinate with internal and external support organizations for IP integration, DFT, Test, package design and manufacturing. Leverage… Show more ASIC design / project manager responsible for customer interface and design implementation from initial design handoff through release to manufacturing and advanced 2.5D package design. Oversee all aspects of the ASIC design process and worldwide team member execution of tasks. Insure the design keeps pace with cost and schedule requirements. Communicate and coordinate with internal and external support organizations for IP integration, DFT, Test, package design and manufacturing. Leverage technology and design subject matter experts to assist with critical design issues when needed. Insure ISO9001 design methodology requirements are met and appropriate documents are maintained. Communicate and coordinate design tasks with the customer design management and team members. Show less

Managing semiconductor RnD team responsible for IP integration and implementation of advanced custom and standard product multi-media SOC designs targeting the home gateway and cable set top box industry. Responsibilities include: * N.America customer RnD interface and strategic alignment * customer design analysis and quotations * Interface to 3rd party IP suppliers and IP selection * Interface to various BE groups- Silicon… Show more Managing semiconductor RnD team responsible for IP integration and implementation of advanced custom and standard product multi-media SOC designs targeting the home gateway and cable set top box industry. Responsibilities include: * N.America customer RnD interface and strategic alignment * customer design analysis and quotations * Interface to 3rd party IP suppliers and IP selection * Interface to various BE groups- Silicon manufacturing, Product Eng, Test, Package Development, CAD Methodology, Quality * SoC project management * package selection and CoDesign development * drive SoC implementation flow improvements * EDA tool selection for SoC BE development * employee growth and development * SoC cost analysis and improvement for division * drive team efficiencies and productivity improvements year over year * Worldwide SoC development including F2B teams in Europe and India * drive SoC flow improvements worldwide * drive improvements in IP quality based on layout challenges * drive cost improvements at silicon levelSoC Design Overview * 65nm, 40nm, 28nm Bulk & 28FDSOI technologies * 1B+ transistors * pioneered true channelless SoC design to drive cost savings in 2007 * pushed block instance count year over year - (4M to 8M instance count PU's in 2015) * SoCs containing multiple embedded processors, hi-freq I/F's, SERDES, DDRx, Analog IP * SoCs containing complex clocking and bussing schemes, multiple PLL, FS Show less

Worked directly with sales throughout N.America to develop the technical sales strategies for enterprise accounts to startup accounts to sell custom design technologies targeting circuit simulation, custom digital implementation, custom analog implementation, and physical verification. Managed and developed a team of engineers who supported specific technologies in these custom design methodologies. Won multiple sales engagements and proliferated these technologies throughout many large, key… Show more Worked directly with sales throughout N.America to develop the technical sales strategies for enterprise accounts to startup accounts to sell custom design technologies targeting circuit simulation, custom digital implementation, custom analog implementation, and physical verification. Managed and developed a team of engineers who supported specific technologies in these custom design methodologies. Won multiple sales engagements and proliferated these technologies throughout many large, key customer accounts. Show less

Worked directly with sales to support all technical and engineering aspects of the sales cycle in this startup company. Worked directly with customers to understand their design needs and provide innovative solutions for their custom digital and analog design implementation requirements.

ASIC Design Engineer responsible for front to back ASIC development. Worked directly with key customer accounts to develop customized ASIC design solutions for the graphics, telecomunications, consumer and industrial computer applications.* logic and transistor level schematic capture and simulation* Place and Route, Extraction, DRC, LVS* Test program generation - conversion from simulation + DC parametrics (TSSI)* EWS & Final Test debug working with Product… Show more ASIC Design Engineer responsible for front to back ASIC development. Worked directly with key customer accounts to develop customized ASIC design solutions for the graphics, telecomunications, consumer and industrial computer applications.* logic and transistor level schematic capture and simulation* Place and Route, Extraction, DRC, LVS* Test program generation - conversion from simulation + DC parametrics (TSSI)* EWS & Final Test debug working with Product Engineering* Interface to Qualification group* Interface to Failure Analysis Group for silicon analysis (lab + IDS5000)* Interface to Silicon Fab team Show less

Product Marketing Engineer - SemiCustom Products Divisionmarketing of Gate Array and Standard Cell solutions to major accounts in North America. Design Engineer - Standard Cell Library Development transistor level design and verification of standard cell library components including gates and registers.