Founder and CEO of Concurrent EDAMy company has created design automation tools that analyze and convert software into FPGA devices. We offer fixed-fee analysis and design services and work with a number of FPGA platforms. See www.ConcurrentEDA.com for more information.Concurrent EDA is also a Visual Applets Design Center for Silicon Software. Visual Applets enables the graphical creation of high-performance computer vision algorithms for FPGA-based frame grabbers and FPGA-based smart cameras. For example, we have a 12MPixel camera running at 300 FPS running Visual Applets. Contact me for more information. Prior life was as an assistant professor at University of Pittsburgh in the Dept. of Electrical and Computer Engineering. I researched and created high-performance architectures with a focus on FPGA-acceleration and high-level synthesis. 50 publications later, I ran out of ink and started Concurrent EDA. I have kept my teaching going but only teach a graduate class on FPGA Hardware Design in the evenings. (ECE 2120)Former-former life was at Purdue where I earned my Ph.D. in Electrical and Computer Engineering. This is where I cut my teeth on FPGAs (Altera Flex 20K, yes a WHILE ago) and had to manually synthesize my VHDL into gates because the tools were sub-optimal. This started my obsession into FPGAs. My thesis was rapid synchronization and collective operations in an FPGA-based network.Specialties: FPGA design (Xilinx, Altera, Lattice, Actel)Acceleration of software using FPGAsFPGA Design Automation Tool DesignHigh performance embedded systemsSilicon Software Visual Applets