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Régis Santonja Email & Phone Number
Fellow Mixed Signal Verification
at
NXP Semiconductors
2 work emails found
@nxp.com
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✓ Verified May 2026
4 data sources
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Current company
Role
Fellow Mixed Signal Verification
Location
Chandler, Arizona, United States
Company size
Who is Régis Santonja? Overview
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Quick answer
Régis Santonja is listed as Fellow Mixed Signal Verification at NXP Semiconductors, a company with 22471 employees, based in Chandler, Arizona, United States. AeroLeads shows a work email signal at nxp.com and a matched LinkedIn profile for Régis Santonja.
Régis Santonja previously worked as Technical Director Mixed-Signal Verification Engineer at Nxp Semiconductors and Principal Mixed-Signal Verification Engineer at Nxp Semiconductors. Régis Santonja holds Msee, Signal Processing And Ic Digital Design from Esiee Paris.
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{first_initial}{last}@nxp.com
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Profile bio
About Régis Santonja
24 years experience in semiconductors (digital and analog)Mixed-signal IC verification- Advanced Mixed-Signal Verification techniques: Hybrid module-based/UVM testbench (drivers, monitors, sequencer, digital and analog parameter randomization), Metric Driven Verification, Functional coverage (mixed-signal assertions), automatic verification plan (vPlan) update (regressions), accurate Verilog-AMS and fast Wreal modeling, SystemVerilog, DPI, VPI.- Motion Sensors verification- Complex Power-Management, Audio and User interface IC (1+ million components)International Team Lead & Project Management- Multi-cultural context (US, Europe, India)- Organize tasks and plannings, priorities, dependencies- Identify blocking situations and coordinate actions- Several projects in parallel- Weekly multi-site team conference calls- Reporting- Project Management Certification at Corphis (Munich)International Experience- California : 9 months- Germany : 9 months- Italy : 3 months- Spain : 2 monthsPersonal Qualities- Rigorous and Methodical- Enthusiast- Team spirit- Open and direct communication- Customer focussed- Ethical- Adaptability (to people, priorities, procedures, environment,...)Innovation- Several Technical Awards at Motorola- Involved in several patentsTechnical Lead and digital design- Baseband LPGA for automotive radio networking (CS Route)- Digital ASIC for an ATM switch/router for Matra Ericsson Telecom (MET)- Technical customer interface- Digital ASIC for Interactive VoD (Video On Demand) - ALCATEL- Design For Test expert (JTAG, scan)Specialties: AMS mixed-signal/mixed-level Verification LeadIC System DesignDigital Design
Listed skills include Asic, Mixed Signal, Soc, Functional Verification, and 44 others.
Current workplace
Régis Santonja's current company
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Nxp Semiconductors
12 roles
Régis Santonja work experience
A career timeline built from the work history available for this profile.
Technical Director Mixed-Signal Verification Engineer
Current
Sep 2016 - Present
Principal Mixed-Signal Verification Engineer
Dec 2015 - Aug 2016
Mixed-Signal Soc Verification Leader
Senior Member of the Technical Staff at FreescaleLeading a WW Task Force within Freescale to capitalize on System and Design Verification best practices and methodologies.Aplications: motion sensors, wireless phones & multimedia portable playersVerification Leader of MMA845x accelerometers family:- Mechanical (MEMS) model simulated with mixed-signal.
Mar 2003 - Aug 2016
Senior Digital Ic Designer (France)
Digital designer on Power Management, Audio and User Interface Mixed-signal ICs. In charge of global IC control logic and digital filters for audio Codec (13 bits resolution, monobit sigma-delta) and stereoDAC (16 bits resolution, 4 bits sigma-delta).
Nov 1998 - Mar 2003
Senior Digital Ic Designer (France)
Csti
Design Leader of baseband processor for automobile's radio networking (first application = highways' automatic tolls)
Jan 1998 - Oct 1998
Oct 1997 - Jan 1998
International Dc Support Engineer (Usa)
International Designer Center Support EngineerBased in LSI LOGIC's headquarter (Milpitas, California)Mission:- Gathering and transfer of advanced information from US factory to european field - Technical support of european ASIC prototypes through backend, manufacturing and testing - Failure analysis of any european ASIC presenting issues.
Apr 1997 - Oct 1997
Senior Applications Engineer (Italy)
Technical Support on customer's ASIC design. DFT expert (JTAG + scan). Vectors generation.
Jan 1997 - Apr 1997
Jul 1996 - Jan 1997
Digital Ic Designer (Germany)
Digital design of FTTC (Fiber To The Curb) ASIC. Application = VoD (Video On Demand) on twisted pair cables (phone lines). Designed ATM frames re-formatting (capture, scrambling, Reed Salomon encoding) + control.
Nov 1995 - Jul 1996
Dec 1994 - Nov 1995
Team & coworkers
Colleagues at NXP Semiconductors
Other employees you can reach at nxp.com. View company contacts for 22471 employees →
HL
Harry Li
Colleague at Nxp Semiconductors
Shanghai, China, China
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RD
Ravinder Dasila
Colleague at Nxp Semiconductors
West Delhi, Delhi, India, India
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王
王韋烽
Colleague at Nxp Semiconductors
Hsinchu City, Taiwan, Taiwan, Taiwan, Province Of China
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KP
Kriangkrai Pimchan
Colleague at Nxp Semiconductors
Bangkok, Bangkok City, Thailand, Thailand
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蔡
蔡宗達
Colleague at Nxp Semiconductors
Taipei, Taipei City, Taiwan, Taiwan, Province Of China
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LA
Lee Ann Seymour
Colleague at Nxp Semiconductors
Novi, Michigan, United States, United States
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JR
Jaap Ruigrok
Colleague at Nxp Semiconductors
Eindhoven, North Brabant, Netherlands, Netherlands
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JY
Jessie Yu
Colleague at Nxp Semiconductors
Chaoyang District, Beijing, China, China
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AS
Adri Smelt
Colleague at Nxp Semiconductors
Arnhem-Nijmegen Region, Netherlands
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AK
Awais Khan
Colleague at Nxp Semiconductors
Johor Bahru, Johore, Malaysia, Malaysia
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Harry Li
Colleague at Nxp Semiconductors
Shanghai, China, China
View →
RD
Ravinder Dasila
Colleague at Nxp Semiconductors
West Delhi, Delhi, India, India
View →
王
王韋烽
Colleague at Nxp Semiconductors
Hsinchu City, Taiwan, Taiwan, Taiwan, Province Of China
View →
KP
Kriangkrai Pimchan
Colleague at Nxp Semiconductors
Bangkok, Bangkok City, Thailand, Thailand
View →
蔡
蔡宗達
Colleague at Nxp Semiconductors
Taipei, Taipei City, Taiwan, Taiwan, Province Of China
View →
LA
Lee Ann Seymour
Colleague at Nxp Semiconductors
Novi, Michigan, United States, United States
View →
JR
Jaap Ruigrok
Colleague at Nxp Semiconductors
Eindhoven, North Brabant, Netherlands, Netherlands
View →
JY
Jessie Yu
Colleague at Nxp Semiconductors
Chaoyang District, Beijing, China, China
View →
AS
Adri Smelt
Colleague at Nxp Semiconductors
Arnhem-Nijmegen Region, Netherlands
View →
AK
Awais Khan
Colleague at Nxp Semiconductors
Johor Bahru, Johore, Malaysia, Malaysia
View →
1 education record
Régis Santonja education
-
Esiee Paris
FAQ
Frequently asked questions about Régis Santonja
Quick answers generated from the profile data available on this page.
What company does Régis Santonja work for?
Régis Santonja works for NXP Semiconductors.
What is Régis Santonja's role at NXP Semiconductors?
Régis Santonja is listed as Fellow Mixed Signal Verification at NXP Semiconductors.
What is Régis Santonja's email address?
AeroLeads has found 2 work email signals at @nxp.com for Régis Santonja at NXP Semiconductors.
Where is Régis Santonja based?
Régis Santonja is based in Chandler, Arizona, United States while working with NXP Semiconductors.
What companies has Régis Santonja worked for?
Régis Santonja has worked for Nxp Semiconductors, Freescale, Motorola Semiconductors, Csti, and Lsi Logic.
Who are Régis Santonja's colleagues at NXP Semiconductors?
Régis Santonja's colleagues at NXP Semiconductors include Harry Li, Ravinder Dasila, 王韋烽, Kriangkrai Pimchan, and 蔡宗達.
How can I contact Régis Santonja?
You can use AeroLeads to view verified contact signals for Régis Santonja at NXP Semiconductors, including work email, phone, and LinkedIn data when available.
What schools did Régis Santonja attend?
Régis Santonja holds Msee, Signal Processing And Ic Digital Design from Esiee Paris.
What skills is Régis Santonja known for?
Régis Santonja is listed with skills including Asic, Mixed Signal, Soc, Functional Verification, Ic, Integrated Circuit Design, Semiconductors, and Systemverilog.
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